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Hardware bug in STM32F051K8

Question asked by Legrand.Thomas.001 on Oct 5, 2012
Latest reply on Oct 11, 2012 by David Littell

Did some more tests on my TIM + DMA issue with also atollic to verify it was not the compiler.

I am now pretty sure it is a hardware bug in the STM32F051.

I tried almost every configuration possible, but if you configure the DMA as it is supposed, you end up having the LS byte copied twice and the MS byte discarded.

For example, if the DMA was supposed to copy 0x1234 in DMAR, you end up with 0x3434 in DMAR, and then in the timer final register (DMAR being a DMA buffer for burst copy).

I guess ST doesn't care either ?