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STM32F2xx SPI DMA FIFO error

Question asked by Jack Peacock on Sep 25, 2012
Latest reply on Jun 11, 2014 by Jack Peacock
When I use DMA on the transmit SPI2 chanel (STM32F205) I consistently get FIFO errors at the end of the transfer, even though the FIFO is disabled.  I verified the DMDIS flag is 0 in the DMA_SxFCR register but the DMA_HISR register still shows FEIF4 flag set.  DMA stream 4 is configured as a dummy SPI clock, no memory or peripheral increment.  Memory and peripheral burst is set to singular (byte).  FIFO is disabled, threshold set to 1/4.

From what I read in the reference manual it should not be possible to get a FIFO error if the FIFO is disabled, yet it still happens.  It doesn't affect transfers but is a mystery.  Has anyone encountered the same situation?
  Jack Peacock