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EXTI pending bit not cleared by edge detector setting change as promised

Question asked by waclawek.jan on Sep 21, 2012
The ST32F4xx user manual, RM0090, on page 205, for the EXTI_PR (pending register) bits says:

> This bit is cleared by writing a 1 to the bit
> or by changing the sensitivity of the edge detector.

The latter one does not appear to be true - changing the corresponding bit in either the EXTI_RTSR or EXTI_FTSR register does not have influence on the state of EXTI_PR register.

A simple test routine below - should end with EXTI_PR in 0, but on the eval board I have at hand it ends with EXTI_PR == 1.

While strictly speaking this is not a bug and it's trivial to work around (simply using the first method); it is at least a documentation error.

Could anybody please confirm or reject?

Thanks,

Jan Waclawek


 EXTI->RTSR = 0;   // both edge detector setting registers set to 0
  EXTI->FTSR = 0;   // (they are 0 by default, but just to be sure)

  EXTI->IMR   = 1;  // unmask interrupt for 0th bit

  EXTI->SWIER = 1;  // this forces the _PR register to 1

  __asm("nop");     // here check that _PR is indeed 1

  EXTI->SWIER = 0;  // shouldn't really be needed

  // changing the edge detector should clear the pending _PR bit
  // we can try changing either rising or falling
  EXTI->RTSR = 1;
//  EXTI->FTSR = 1;

  __asm("nop");     // okay so here _PR should be 0 again

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