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New to STM32F405xx, general architecture feasability

Question asked by rocca.stephane on Sep 10, 2012
Latest reply on Sep 11, 2012 by fm
Hi all,

Coming from AVR 8 bits architecture, I plan to work (hard) to develop an IMU under STM32F405xx now.
I'd like to know if the following architecture is correct. I believe it's possible from my first readings of datasheet, application notes and examples from ST, but I'd like a confirmation.
And of course I would need to analyze example code to start my work on. So I would be very glad if you can advise me some examples or application note for each separate function I need :

Hardware drivers through DMA to save CPU :
- continuous usage of SPI1 through DMA
- continuous usage of SPI3 R/W on SD card through DMA
- continuous usage of I2C1 through DMA 400 KHz (is it possible at higher frequency too ?)
- continuous usage of I2C2 through DMA 400 KHz
- continuous usage of UART6 through DMA

- Hard Interrupt from an INPUT GPIO (rising edge only), and from the same source signal, an Input Capture to access accurate duration between each change (Rising only too)
- Soft Interrupt from an overflow timer (low frequency : max 4000 Hz) 


- ADC readings for a joystick, low criticality, low frequency, so I believe without DMA is possible
- Input pin reading level (for a button), low criticality, so without interrupt

- 4x PWM Outputs

And of course with the FPU enabled to do great maths with, at the maximum update frequency !

Especially, do you know a tutorial to discover DMA, because it seams to be quite different from the INTERRUPT VECTORS from the 8bits AVR architecture, especially concerning priority of the different interrupts ? Application notes are not exhaustive at the moment for F4, and I don't know if I can use others from other like STM32F1...

So I would appreciate a lot every advise, example or warning before I begin my work, 

So thanks a lot ;)

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