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Why do I see ARM (Non-Thumb) code commands in my dissassembly?

Question asked by bil.til on Aug 24, 2012
Latest reply on Aug 25, 2012 by bil.til
As I understand the programming manual (DM00046982), a Cortex M4 processor as the STM32F4 can only work with Thumb mode (T2 I think).

But if I use the ST4Discovery with Keil uVision, in the Dissambly I see as well 32bit-ARMv7 code (32 bit commands), as Thumb code (16 bit commands). E. g. for LDR commands it seems to use the Thumb command for small offsets, and the ARM command for larger offsets.

This really puzzles me very much - how can I see 32bit-ARMv7 in the dissassembly listing, if the processor can only understand Thumb code?

...  I just recognized in the ARMv7 TRM, that Thumb commands can have 32 bits (if leading 5 bits are 0b11111, 0b11110 or 0b11101). Just in the command discription of the ARMv7 TechRefManual it is very disturbing, that the commands are named either "All versions of the Thumb instruction set" or "ARMv7-M" (I assume "ARMv7-M" also is some sort of subset of the "Thumb instruction set"?)

Are all Encodings T1, T2, T3, T4 specified e. g. for the LDR command in the ARMv7 TechRefManual also available for STM32F4, or are there any restrictions?