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STM32F407 DMA. Problem transfer data by DMA from internal memory to external memory with 8-bit data bus.

Question asked by sharopin.yuri on Aug 10, 2012
I translate my project from stm32f103ZE to stm32f407ZG.
On the F1 used  data  transmission by DMA from internal buffer (uint16_t buf[]) to
external memory (chip w5100 8 bit data bus). In F1 it works well.
The chip W5100  transmits the data in the correct order: LowByte1, HightByte1, LowByte2, HigthByte2, ...
In F4  not working.
I tried all the configuration  options  for DMA controller and FSMC of MCU F4: either only the
high bytes are transferred, or only low bytes.

How do I transfer data from the buffer (uint16_t) in the chip W5100 with 8-bit bus?

My code:
// F1 FSMC - Configurathion -----------------------------------------------------------------------
  p.FSMC_AddressSetupTime       = 2;    // в единицах HCLK (== 1/72МГц == 14нс) ( Internal AHB clock frequency )
  p.FSMC_AddressHoldTime        = 0;    //
  p.FSMC_DataSetupTime          = 2;    // 2
  p.FSMC_BusTurnAroundDuration  = 0;    //
  p.FSMC_CLKDivision            = 0;    // для SRAM или PSRAM величина не имеет знаячения
  p.FSMC_DataLatency            = 0;    // не для SRAM
  p.FSMC_AccessMode             = FSMC_AccessMode_A;  //
  FSMC_NORSRAMInitStructure.FSMC_Bank               = FSMC_Bank1_NORSRAM2;
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux     = FSMC_DataAddressMux_Disable;
  FSMC_NORSRAMInitStructure.FSMC_MemoryType         = FSMC_MemoryType_PSRAM;         
  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth    = FSMC_MemoryDataWidth_16b;
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode    = FSMC_BurstAccessMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;  
  FSMC_NORSRAMInitStructure.FSMC_WrapMode           = FSMC_WrapMode_Disable;        
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive   = FSMC_WaitSignalActive_BeforeWaitState;
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation     = FSMC_WriteOperation_Enable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal         = FSMC_WaitSignal_Disable;     
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode       = FSMC_ExtendedMode_Disable;  
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst         = FSMC_WriteBurst_Disable;  
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct  = &p;

/// F4  FSMC - Configurathion
  p.FSMC_AddressSetupTime       = 6;
  p.FSMC_AddressHoldTime        = 2;
  p.FSMC_DataSetupTime          = 8;
  p.FSMC_BusTurnAroundDuration  = 3;
  p.FSMC_CLKDivision            = 0;
  p.FSMC_DataLatency            = 0;
  p.FSMC_AccessMode             = FSMC_AccessMode_A;
  FSMC_NORSRAMInitStructure.FSMC_Bank               = FSMC_Bank1_NORSRAM2;
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux     = FSMC_DataAddressMux_Disable;
  FSMC_NORSRAMInitStructure.FSMC_MemoryType         = FSMC_MemoryType_PSRAM;
  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth    = FSMC_MemoryDataWidth_16b;
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode    = FSMC_BurstAccessMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait   = FSMC_AsynchronousWait_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
  FSMC_NORSRAMInitStructure.FSMC_WrapMode           = FSMC_WrapMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive   = FSMC_WaitSignalActive_BeforeWaitState;
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation     = FSMC_WriteOperation_Enable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal         = FSMC_WaitSignal_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode       = FSMC_ExtendedMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst         = FSMC_WriteBurst_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct  = &p;
 
// F1 - DMA2
  W5100_DMA_InitStructure.DMA_PeripheralBaseAddr  = (u32)(W5100_BEGIN_ADDR + (u32)(Waddr<<1));
  W5100_DMA_InitStructure.DMA_MemoryBaseAddr      = (u32)(Buffer_addr);  // Source
  W5100_DMA_InitStructure.DMA_BufferSize          = len;    
  W5100_DMA_InitStructure.DMA_DIR                 = DMA_DIR_PeripheralDST;    
  W5100_DMA_InitStructure.DMA_PeripheralInc       = DMA_PeripheralInc_Enable;
  W5100_DMA_InitStructure.DMA_MemoryInc           = DMA_MemoryInc_Enable;
  W5100_DMA_InitStructure.DMA_PeripheralDataSize  = DMA_PeripheralDataSize_HalfWord;
  W5100_DMA_InitStructure.DMA_MemoryDataSize      = DMA_MemoryDataSize_Byte;//DMA_MemoryDataSize_HalfWord;// шина с чипов 8 разрядная!! DMA_MemoryDataSize_Byte;// - для передачи двух байт, также поменять размер передаваемых байт == sizeof()
  W5100_DMA_InitStructure.DMA_Mode                = DMA_Mode_Normal;
  W5100_DMA_InitStructure.DMA_Priority            = DMA_Priority_High;
  W5100_DMA_InitStructure.DMA_M2M                 = DMA_M2M_Enable;  
  DMA_Init( DMA2_Channel2, &W5100_DMA_InitStructure );  
  DMA_ITConfig( DMA2_Channel2, DMA_IT_TC, ENABLE );
  DMA_Cmd( DMA2_Channel2, ENABLE );  
 
// F4 - DMA2
  DMA_InitStructure.DMA_Channel             = DMA_Channel_2;
  DMA_InitStructure.DMA_PeripheralBaseAddr  = (uint32_t)(Buffer_addr); // Source
  DMA_InitStructure.DMA_Memory0BaseAddr     = (uint32_t)(W5100_BEGIN_ADDR + (uint32_t)(Waddr<<1));
  DMA_InitStructure.DMA_DIR                 = DMA_DIR_MemoryToMemory;
  DMA_InitStructure.DMA_BufferSize          = len;
  DMA_InitStructure.DMA_PeripheralInc       = DMA_PeripheralInc_Enable;
  DMA_InitStructure.DMA_MemoryInc           = DMA_MemoryInc_Enable;
  DMA_InitStructure.DMA_PeripheralDataSize  = DMA_PeripheralDataSize_Byte;
  DMA_InitStructure.DMA_MemoryDataSize      = DMA_MemoryDataSize_HalfWord;
  DMA_InitStructure.DMA_Mode                = DMA_Mode_Normal;
  DMA_InitStructure.DMA_Priority            = DMA_Priority_VeryHigh;
  DMA_InitStructure.DMA_FIFOMode            = DMA_FIFOMode_Enable;
  DMA_InitStructure.DMA_FIFOThreshold       = DMA_FIFOThreshold_HalfFull;
  DMA_InitStructure.DMA_MemoryBurst         = DMA_MemoryBurst_Single;
  DMA_InitStructure.DMA_PeripheralBurst     = DMA_PeripheralBurst_Single;    
  DMA_Init( DMA2_Stream2, &DMA_InitStructure );  
  DMA_ITConfig( DMA2_Stream2, DMA_IT_TC , ENABLE );
  DMA_Cmd( DMA2_Stream2, ENABLE );
  uint16_t Timeout = 10000;
  while ((DMA_GetCmdStatus(DMA2_Stream2) != ENABLE) && (Timeout-- > 0))
  {
  }
  if ( 0 == Timeout ) WR_DEBUG("Error DMA2_Stream2 !!!! ");
// --------------------------------------------------------------------------------------------------  
  what am I doing wrong?
  Please help me!
 
 

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