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documentation of reset behavior ?

Question asked by brown.geoffrey on Jan 16, 2012
Latest reply on Jan 16, 2012 by Clive One
The cortex-M3 specification has the reset vector at 0x0000004.  The stm32 places it in flash at 0x08000004, but requires modifying the vector table offset as part of the startup code. 

PM0056 says this:

The Program Counter (PC) is register R15. It contains the current program address. Bit[0] is always 0 because instruction fetches must be halfword aligned. On reset, the processor loads the PC with the value of the reset vector, which is at address 0x00000004.

I found this in RM00041 (section 2.4 -- Boot configuration)

Boot from main Flash memory: the main Flash memory is aliased in the boot memory space (0x0000 0000), but still accessible from its original memory space (0x800 0000). In other words, the Flash memory contents can be accessed starting from address 0x0000 0000 or 0x800 0000.

Is that the whole story, or is there some other documentation ?  Does the aliasing persist or is just at startup ?


Geoffrey

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