AnsweredAssumed Answered

Some more DCMI problems F207IG

Question asked by h.brad on Jan 9, 2012
Latest reply on Jan 18, 2013 by rao.nakul
Hello everyone,

A couple months back I was having some issues with DCMI that were mostly solved with some help here at the forums. You can see the pevious thread [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/DCMI Issues, looking for insight&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&TopicsView=https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/AllItems.aspx?Paged%3DTRUE%26p_StickyPost%3D%26p_DiscussionLastUpdated%3D20111212%252010%253a46%253a14%26p_ID%3D19852%26View%3D%257bF47A9ED8%252dE726%252d42BE%252dACED%252d732F13B66581%257d%26FolderCTID%3D0x012001%26PageFirstRow%3D121&currentviews=590]here.

I am now attempting to get high resolution images working. I have a new board in with direct connections of the data, sync, and clock lines from the MT9v024 sensor ( previously through LVDS ).

I have no problem capturing low resolution images which has the pixel clock binned by 4 from 14MHz to 3.5MHz. When I try to bin by 2 or without any binning at all I cannot see the end of frame get set. I am clocking the HCLK up from 32MHz to 120MHz, as well as maxing out the peripheral clocks, to capture the image ( even when binning by 4 ).

Has anyone else ran across this type of issue, or have any idea why I would not be seeing end of frame with a faster pixel clock. From my understanding 14MHz should be well within range of the DCMI processing, escpecially with the MCU clocked up to 120MHz.

Any response would be appreciated.

Thanks,

Brad

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