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MCBSTM32C dev board CODEC

Question asked by schaffer.tim on Dec 29, 2011
Latest reply on Dec 30, 2011 by schaffer.tim
I have a MCBSTM32 board which uses the STM32F107 and includes a CS42L52 audio CODEC chip on board. I'm trying to create a 12 MHz clock input for the CODEC using TIM3 from the STM32. So far I have succeeded in generating the required 12MHz clock, but I'm not sure if it will work for the CODEC. The CODEC will accept smaller clock values (8KHz etc...) but I figured it was easier to only have to worry about one clock vs. several clocks.

I have attached screenshots of the output and wanted to get some feedback, as they don't look very pretty.  My thoughts are that I'm simply approaching the upper limits of the STM's clocking ability. As I understand it the 72MHz is simply multiplied from the real clock @ 25 MHz? In my code the system clock is set for 72MHz. Below is the timer setup code:

int main(void)
{

RCC->APB2ENR |= RCC_APB2ENR_IOPCEN | RCC_APB2ENR_AFIOEN;
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;

GPIOC->CRL = 0x0b000000;                                                            // Enable pin 6 @ 50mhz

AFIO->MAPR = AFIO_MAPR_TIM3_REMAP;                                        // Remap TIM3 pins to PC6, 7, 8 and 9

TIM3->PSC = 2;                                                                                // Set prescaler to 2 (PSC + 1 = 3; SYSCLK(72MHz) / 3 = 12 MHz)
TIM3->ARR = 1;                                                                                 // Auto reload value

TIM3->CCR1 = 1;                                                                                // Start PWM duty for channel 1

TIM3->CCMR1 = TIM_CCMR1_OC1M;

TIM3->CCER = TIM_CCER_CC1E;                                                        // Enable compare on channel 1
TIM3->CR1  = TIM_CR1_CEN;                                                            // Start timer

//TIM3->DIER = TIM_DIER_UIE; // Enable update interrupt (timer level)
//NVIC_EnableIRQ(TIM3_IRQn); // Enable interrupt from TIM3 (NVIC level)

while (1) {}
}

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