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TIM1 configuration and it's behavior

Question asked by kowalski.jan.002 on Dec 28, 2011
Latest reply on Dec 28, 2011 by kowalski.jan.002
Hi, first of all sorry for my english but I hope you will understand me.
Here is a TIM1 configuration form DSO nano project. I've rewrited it to more readable format:
TIM1->PSC = 30;
TIM1->ARR = 35;
TIM1->CCR1 = (35+1)/2;


TIM1->CR1 = TIM_CR1_DIR | TIM_CR1_URS | TIM_CR1_ARPE;
TIM1->RCR = 0x0000;
TIM1->CCER = TIM_CCER_CC1E;
TIM1->CCMR1 = TIM_CCMR1_OC1FE | TIM_CCMR1_OC1PE | TIM_CCMR1_OC1M;
TIM1->BDTR = TIM_BDTR_MOE;
TIM1->DIER = TIM_DIER_CC1DE |TIM_DIER_UDE | TIM_DIER_TDE;
TIM1->CR1 = TIM_CR1_CEN;

Can somebody explain me how this configuration behave? Am I correct if I think the period of occuring events is (PSC+1)*(ACC+1)/72MHz ? (does the TIM1->CCR1 = (35+1)/2; have any meaning?) How works bits TDE and UDE?

I take a simple experiment with this configuration with set bits TDE  UDE and without them but I dont see any difference (of course in DMA usage).

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