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STM32F103C8T6 SPI problem

Question asked by nadgouda.rahul on Aug 31, 2011
Latest reply on Sep 2, 2011 by malund.erik

I am trying to establish communication between STM32F103C8T6 and an ASIC using SPI.The STM32 is the master and the ASIC is the slave. The requirement of the ASIC is that it requires the MOSI line to be high during idle(i.e the MOSI line should have an high state before clock appears on the SCK line).I have added pull up resistors of 4.7kohms on MISO,MOSI and SCK lines. I am not using NSS pin. Here are my observations:
1. The MOSI line latches to either high or low value which is dependent on the data shifted through the buffer.
2. When I set the SPE bit(SPI enable bit) in SPI CR1 register, the MOSI line is pulled low .The pin is configured as Alternate function output(observed in push pull as well as open drain).
I have verified the other settings.

Please help me out people, this is really very urgent.