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[STM32F2xx] 120MHz + 3 wait state = bugs?

Question asked by Legrand.Thomas.001 on Aug 9, 2011
Latest reply on Aug 15, 2011 by CrashAndBurn

Since the beginning of the project on the STM32F205RG, I had hard faults from time to time.

These last days, I wrote a hard fault handler as described in Joseph Yiu's book to see why ... and the result was very unexpected.

I had hard fault from basically everywhere, any line of code (even in the STM periph library) ... and the type of fault was even more wierd ... illegal instruction, coprocessor request, etc ...

Somewhere in my code I write FLASH ... and sometimes I had a programming error with no obvious reason why. I've put a bearkpoint just where (in the periph library) the test is done to see if there was a programming error (doing a logical and between FLASH->SR and 0xEF), and surprise, when breakpoint triggered, the debugger showed me a FLASH->SR value of ... 0.

This could only mean a problem within the MCU ...

I was running at 120MHz with all prefetches etc and 3 flash wait states.
I switched to no optimization and 4 wait states ...

No more hard faults, not more flash programming errors, program was running - slower but - smooth.

I need to figure out which optimization made the MCU to act like this, but I'm a bit disappointed that ST claims some figures about flash and ART performances if it's not true ...