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APB1 prescaler issue STM32F3DISCOVERY

Question asked by spiezia.andrea on Jan 11, 2016
Latest reply on Jan 12, 2016 by spiezia.andrea
Hi all,
I've some problem with APB1, APB low speed prescaler setting.
File stm32f30x.h of STM32F3-Discovery_FW_V1.1.0\Libraries, reports the below PPRE1 meaning in according with  DM00043574 pg. 142:

#define  RCC_CFGR_PPRE1_DIV1  ((uint32_t)0x00000000) /*!< HCLK not divided */
#define  RCC_CFGR_PPRE1_DIV2  ((uint32_t)0x00000400) /*!< HCLK divided by 2 */
#define  RCC_CFGR_PPRE1_DIV4  ((uint32_t)0x00000500) /*!< HCLK divided by 4 */
#define  RCC_CFGR_PPRE1_DIV8  ((uint32_t)0x00000600) /*!< HCLK divided by 8 */
#define  RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) /*!< HCLK divided by 16 */

I've tried to set all the PPRE1 values in SetSysClock() and measured with my scope, and I see that:

RCC_CFGR_PPRE1_DIV1    HCLK not divided 
RCC_CFGR_PPRE1_DIV2    HCLK not divided 
RCC_CFGR_PPRE1_DIV4    HCLK divided by 2
RCC_CFGR_PPRE1_DIV8    HCLK divided by 4
RCC_CFGR_PPRE1_DIV16   HCLK divided by 8

Have you aver seen the same behavior?