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Questions on memory map of STM32F439

Question asked by aiyer.kartik on Jun 26, 2014
Latest reply on Jun 27, 2014 by Clive One
I've spent about three months working on the STM32F439 Evaluation platform and this is my first time taking on an embedded platform single handed and developing software on it, so please forgive my ignorance. 

I'm trying understand my applications use of SRAM to get an idea of how much memory I'm actually using. I'm using IAR for my tool chain. 
So according to the STM32F4xx reference manual and the comments in the stm32f43x9 bsp provided in the demo application supplied, SRAM1 is 112 KB, SRAM2 is 16k and SRAM3 is 64KB and is visible only to the processor totalling to 192KB. However, the data sheet for the STM32F439NI chips say that there is 256KB of SRAM available. Where is the extra SRAM or am I missing something?

Here is the peripheral map I got from stm32439xx.h


#define FLASH_BASE            ((uint32_t)0x08000000) /*!< FLASH(up to 1 MB) base address in the alias region                         */
#define CCMDATARAM_BASE       ((uint32_t)0x10000000) /*!< CCM(core coupled memory) data RAM(64 KB) base address in the alias region  */
#define SRAM1_BASE            ((uint32_t)0x20000000) /*!< SRAM1(112 KB) base address in the alias region                             */
#define SRAM2_BASE            ((uint32_t)0x2001C000) /*!< SRAM2(16 KB) base address in the alias region                              */
#define SRAM3_BASE            ((uint32_t)0x20020000) /*!< SRAM3(64 KB) base address in the alias region                              */
#define PERIPH_BASE           ((uint32_t)0x40000000) /*!< Peripheral base address in the alias region                                */
#define BKPSRAM_BASE          ((uint32_t)0x40024000) /*!< Backup SRAM(4 KB) base address in the alias region                         */
#define FMC_R_BASE            ((uint32_t)0xA0000000) /*!< FMC registers base address                                                 */
#define CCMDATARAM_BB_BASE    ((uint32_t)0x12000000) /*!< CCM(core coupled memory) data RAM(64 KB) base address in the bit-band region  */
#define SRAM1_BB_BASE         ((uint32_t)0x22000000) /*!< SRAM1(112 KB) base address in the bit-band region                             */
#define SRAM2_BB_BASE         ((uint32_t)0x2201C000) /*!< SRAM2(16 KB) base address in the bit-band region                              */
#define SRAM3_BB_BASE         ((uint32_t)0x22020000) /*!< SRAM3(64 KB) base address in the bit-band region                              */
#define PERIPH_BB_BASE        ((uint32_t)0x42000000) /*!< Peripheral base address in the bit-band region                                */
#define BKPSRAM_BB_BASE       ((uint32_t)0x42024000) /*!< Backup SRAM(4 KB) base address in the bit-band region                         */


Also, STemWin uses a region of memory as its video bufferes where it has two layer buffers 
worth of memory. I'm not sure where this actually maps to. The addresses according to the LCDconf.c file supplied in the BSP package supplied with evaluation board are:
#define LCD_LAYER0_FRAME_BUFFER  ((int)0xC0200000)#define LCD_LAYER1_FRAME_BUFFER  ((int)0xC0400000)
Can someone clue me in on this.

Finally, I'm trying to understand how much memory is actually being used when I build my code and I was wondering if someone can help me understand the output from the IAR compiler.

I configure the build window to output all MEssages which includes the code size. At the end of the build I get this:

  110 576 bytes of readonly  code memory 
  373 351 bytes of readonly  data memory 
  177 897 bytes of readwrite data memory 

Do the readonly code and data memory always reside in flash or are they transferred to SRAM during the bootup process ? 

Also based on the read write memory usage, should I interpret that my SRAM usage is 173 Kb, Implying that I'm using 173 / 192 KB ?

Any help here would be much appreciated.

Regards
Kartik

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