Baudrate for USART

- Read The Fine Manual - table 176 on page 679 shows exact baud rates and baud rage generator values for 72 MHz operation. Examples cover 2400 to 115200 baud and beyond. At 36 MHz only 115200 baud is off by 0.15%. This is well within the tolerance range for USART communication.

These operational frequencies are easily obtained using a 8 MHz crystal. Such parts may cost less. Future availability is more likely as well.

RM0008 is only slightly over 1000 pages. A month of banging your head and asking questions will save you few days reading all of it. Quote: I can't find the fine manual on the ST's web

Really??

They are all here: www.st.com/mcu/familiesdocs-110.htmlQuote:

Your mean is that the STM32 has a Independent Baud Rate Generator?

Never heard of this term. The baud rate divider is not an integer divider, but has a 4 bit fractional part. A bit simplified it means that you get the results of a regular integer divider fed with 16 times the system/bus clock. Which means you a get sufficiently precise baud rate derived from any system clock rate unless it's exceptionally low.- Forget the fraction part. Here’s how: all STM32 USART sections use a 16x the baud rate clock. Therefore load the 16-bit clock divisor with x/(16*baudRate) where x = the input frequency. In many cases the input frequency is 72 MHz for USART1 and 36 MHz for the others. Thus for USART1 at 4.5 Mbaud the 16-bit clock divisor is 1.

My head would spin off if I had to think of this as 0.0625

The reason for exact or quite close enough is the high (by historical standards) input frequency and the large range of divisor possibilities. For USART1 for 9600 baud I would load USART_BRG with 72000000/(16*9600) and let the assembler or compiler do the arithmetic. - Hello picguy, I'd argue, because the 16x bigger clock is used to position the sampling points within the bit period and for oversampling (see RM).

There is no more space for fractional prescaler here within those 16 clock cycles, so it must be implemented in the prescaler itself, eg. like a phase modulation divider? Quote:

USART1 for 9600 baud I would load USART_BRG with 72000000/(16*9600) and let the assembler or compiler do the arithmetic.

Besides the question of 36MHz bus clock vs 72MHz system clock, that's what you would do if it were not a fractional divider, but the usual x16 baud rate frequency divider.

In fact, what you really have to do is to load BRG with busclock/baudrate. The x16 sampling frequency is compensated for by the 4 bit fractional part, so the integer part of BRG is your busclock/(16*baudrate). But the identity of fraction length and x16 sampling is nice but pure chance. Some other device has a 5 bit fractional part but still x16 sampling.

Both the reference and the periph lib take different approaches, being quite a bit more complex that this simple calculation, but other than rounding differently they end up the same.

[ This message was edited by: prx on 29-12-2009 01:19 ]

Chinese:

请问一下用了STM32的朋友，对它的串口设置波特率会不会要像AVR或51一样选用特定的晶振来使波特率没有误差？比如51或AVR在使用11.0592或18.432等晶振时波特率从110到115200都没有误差。 :-[