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Help understand bits mapping in SPDIFRX_Loopback example

Question asked by fourneron.jean_marc on Nov 3, 2016

Dear all,

In need to implement SPDIFTX with a nucleo board. In want to rely on the SPDIFRX_Loopback example provided for the STM32F769I-Discovery, part of Cube_FW_F7 package.

This example seems to implement exactly what I need: send 16 bits stereo data to SPDIF and then compare the looped back results.

The SPDIF -TX data width is fixed to 24 bits (reference manual). I don't understand in the example when/how is performed the 16 bits to 24 bits adjustment and alignment to have the significant bits in the right place.  

DMA transfer to SAI is set to be from halfword to halfword. How is it done that we don't have SAI send to the TX line a word (two consecutive values grouped, which would be bad), or 24 bits but with the provided halfword in the bad place.

Any help to understand the underlying mechanism would be greatly appreciated.

Best regards,