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Initialize TIM2 Channel 2 for PWM Output in Assembly

Question asked by shaw.kyle on Mar 15, 2014
Latest reply on Mar 17, 2014 by shaw.kyle

I have a STM32F100RB discovery board and I am trying to setup up TIM2 Channel 2 to output a PWM signal using assembly language, but I am having trouble sorting through the reference manual. The code I have so far to initialize the TIM2 registers is below. This code is part of a larger program that works, so I know my TIM2 initialization is the problem. If someone can point out where I have went wrong it would be greatly appreciated!

;TIM2 - Base Addr: 0x4000 0000
TIM2_CR1     EQU 0x40000000 ; TIM1 Control Register 1
TIM2_CR2     EQU 0x40000004 ; TIM1 Control Register 2
TIM2_SMCR     EQU 0x40000008 ; TIM1 Slave Mode Control Register
TIM2_DIER     EQU 0x4000000C ; TIM1 DMA/Interrupt Enable Register
TIM2_SR          EQU 0x40000010 ; TIM1 Status Register
TIM2_EGR     EQU 0x40000014 ; TIM1 Event Generation Register
TIM2_CCMR1     EQU 0x40000018 ; TIM1 Compare/Capture Mode Register 1
TIM2_CCMR2     EQU 0x4000001C ; TIM1 Compare/Capture Mode Register 2
TIM2_CCER     EQU 0x40000020 ; TIM1 Compare/Capture Enable Register
TIM2_CNT     EQU 0x40000024 ; TIM1 Counter
TIM2_PSC     EQU 0x40000028 ; TIM1 Prescaler
TIM2_ARR     EQU 0x4000002C ; TIM1 Auto-reload Register
TIM2_RCR     EQU 0x40000030 ; TIM1 Repetition Counter Register
TIM2_CCR1     EQU 0x40000034 ; TIM1 Capture/Compare Register 1
TIM2_CCR2     EQU 0x40000038 ; TIM1 Capture/Compare Register 2
TIM2_CCR3     EQU 0x4000003C ; TIM1 Capture/Compare Register 3
TIM2_CCR4     EQU 0x40000040 ; TIM1 Capture/Compare Register 4
TIM2_BDTR     EQU 0x40000044 ; TIM1 Break and Dead-time Register
TIM2_DCR     EQU 0x40000048 ; TIM1 DMA Control Register
TIM2_DMAR     EQU 0x4000004C ; TIM1 DMA Address Register

;Registers for config and enabling the clocks
;Use Reset and Clock Control Register (RCC) base address = 0x40021000
RCC_APB2ENR EQU     0X40021018
RCC_APB1ENR EQU     0X4002101C      

clock_init   ;Enable peripheral clocks for various ports and subsystems     
     ldr     R6,=RCC_APB2ENR
     mov R0, #0x00000A1D     ;Enable Alt Fcn IO, GPIO ABC, ADC1, and TIM1
     str     R0,[R6]               
     ldr     R6,=RCC_APB1ENR
     mov R0, #0x00000001     ;Enable TIM2 Clock
     str     R0,[R6]

     ldr     R6,= GPIOA_CRL
     ldr R0,= 0x4444BBB4     ;A1, A2, A3 are alt fcn (PWM) 
     str     R0,[R6]               

     ldr R6, = TIM2_CR1
     mov R0, #0x01 ;set CEN bit high to start up system
     str R0, [R6]
     ldr R6, = TIM2_EGR
     mov R0, #0x01 ;initialize registers
     str R0, [R6]
     ldr R6, = TIM2_CCMR1
     mov R0, #0x6C00 ;set OC2M = 110 and OC2PE = 1 and OCPFE = 1
     str R0, [R6]
     ldr R6, = TIM2_CCER
     mov R0, #0x0001 ;CC2E = 1
     str R0, [R6]
     ldr R6, = TIM2_PSC
     mov R0, #799 ;divide value to get 10kHz clock into counter
     str R0, [R6]
     ldr R6, = TIM2_ARR
     mov R0, #200 ;Period so that it is 20ms
     str R0, [R6]
     ldr R6, = TIM2_CCR2
     mov R0, #100 ;PW value 
     str R0, [R6]
     ldr R6, = TIM2_CR1
     mov R0, #0x01 ;set CEN bit high to start up system
     str R0, [R6]

main PROC

     ;other code that works...

     B main