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STM32 Cube HAL - CAN FIFO Interrupts

Question asked by ElBartscho on Sep 12, 2016
Latest reply on Sep 13, 2016 by d-chris

Hi, I would like a to use a completely interrupt driven CAN Interface for STM32Fx Controllers.

CAN is working properly but if I transmit multiple messages via CAN sometimes I have to wait because evry one of three can tx buffer is full.  

The following Register indicates that:

 __IO uint32_t              TSR;                 /*!< CAN transmit status register,        Address offset: 0x08          */

Actually I want to wait exactly as long I have to. That means, wait (OS context switch) as long there is at least one of the three tx-buffes empty, signal that to me and I can go on with my data transmission.

The following flags indicates that there is a possibility to handle that with interrupts as well:

#define CAN_IT_TME                  ((uint32_t)CAN_IER_TMEIE)   /*!< Transmit mailbox empty interrupt */

/* Receive Interrupts */

 

#define CAN_IT_FMP0                 ((uint32_t)CAN_IER_FMPIE0)  /*!< FIFO 0 message pending interrupt */
#define CAN_IT_FF0                  ((uint32_t)CAN_IER_FFIE0)   /*!< FIFO 0 full interrupt            */
#define CAN_IT_FOV0                 ((uint32_t)CAN_IER_FOVIE0)  /*!< FIFO 0 overrun interrupt         */
#define CAN_IT_FMP1                 ((uint32_t)CAN_IER_FMPIE1)  /*!< FIFO 1 message pending interrupt */
#define CAN_IT_FF1                  ((uint32_t)CAN_IER_FFIE1)   /*!< FIFO 1 full interrupt            */
#define CAN_IT_FOV1                 ((uint32_t)CAN_IER_FOVIE1)  /*!< FIFO 1 overrun interrupt         */

 

But I absolutely found no way to use that interrupts in my application? My Plan is, that my RTOS will switch the context if there is no space in the tx buffers and after the correct event occurs (set by ISR) the application will resume with sending something by can.

A solution could also be just wait polling the TSR-Register, but I don't like that spinlock solution.

Anyone has some idea to handle that?

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