On 27-05-2009 at 16:39, Anonymous wrote:
The limitation may come from the internal design of the SPI module, as it might require 2 or 4 peripheral clock cycles to read the data correctly.
18MHz it still good, as other SPI modules in other MCUs have even lower communication speeds (specially in Slave mode).
Chip`s developers ... must know the answer.
Retrieving data ...