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STM32F3 discovery: SPI in 16 bit mode???

Question asked by wolff.roger on Jun 30, 2013
Latest reply on Sep 30, 2015 by algfors.tomas
Hi,

I'm sending data on the SPI interface. This seems to work a bit.
The most important difference from what I expected is now that I want to put an 8bit value in the DR register, and I end up with 16 bits being clocked out.
I've set "ds[3:0]" to the value 0x07: 8 bit datasize.

For debugging my app allows me to dump the register contents:
40003800   0000007c 00000704 00000403 0000ffff
40003810   00000007 00000000 00000000 00000000
40003820   00000002 00000000 00000000 00000000
The "7" in 704 are the "data size" bits if I'm correct.
dataregister reads as 0xff, as my miso is currently still "stuck at 1" (at least the logic analyser agrees with the stm32).

The other problem I'm seeing is that I can't find a way to "wait for transmission to complete". When I activate-SS/send/wait-for-completion/deactivate-SS, I always see a pulse on the SS line shorter than a bit. For now I've got just a "delay()" in there. Works for now, but it would be nicer if something like:

           while (!(SPI_SR(SPI2) & SPI_SR_TXE));

would work. Ok! Got it. Fixed that one! Apparently I started out with something in the RX fifo, so when I transferred something, I had immediately data to get from the RX fifo. Clearing the FIFO before the SPI transfer causes the wait-for-RX-data to actually wait....

That leaves the "why do I get 16 bits" question.... 

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