AnsweredAssumed Answered

Testing timer overflow flag in ISR

Question asked by trela.piotr on May 11, 2011
Latest reply on May 11, 2011 by trela.piotr

I am using STR7 microcontroller and I have problems with checking the state of Timer3, in ISR triggered by Timer2.

Timer3 works in PWM mode and produces 125kHz waveform. It is not configured to generate interrupts. It simply toggles the pin in hardware.

Timer2 also works in PWM mode but is used to trigger an interrupt every 125us. Timer3 output (one that gives 125kHz) is gated through AND gate so that it can be modulated from Timer2 ISR.

I have problem synchronizing 125kHz signal with the modulating signal. I want the modulating signal to change the state exactly half way through low or high state on 125kHz output. At the moment modulating signal meets with 125kHz at a random places.
The most obvious solution to me was to test Timer3 overflow flag in Timer2 ISR just before toggling modulating pin. I could then wait for a couple of microsecond I require. It does not seem to be possible though. I am testing the overflow flag in the following way:

      while (TIM_FlagStatus (TIM3, TIM_TOF) != SET);

It does not look like the Timer3 overflow flag gets ever set though. I do not understand why this should be like this. This line of code works fine anywhere outside of Timer2 ISR.

Does Timer2 interrupt ISR disable Timer3 or access to Timer3?

Thanks in advance for any help