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Secure Debug Authentication

Question asked by nyczkowski.lukas.001 on Oct 17, 2014
I am using SPEAr1310 (SPEAR1310CPUC evaluation board, revision 1). I want to use Memory Mapped debug interface to setup breakpoints. I have read the interface base address using cp14 Cooprocessor (DBGDRAR, DBGDSAR). However, when I try to read any of Memory Mapped debug registers I am getting DATA ABORT exceptions. I've configured this memory region to be supervisor RWX and Non-cacheable.
Is there any special peripheral I shall configure before to avoid DATA ABORTs?

Please respond.