AnsweredAssumed Answered

Bug in STM32CubeMX clock configuration

Question asked by Zhong.Wenbin.001 on Nov 12, 2015
Latest reply on Dec 1, 2015 by STM32Cube-T
Experiment Set-up:
STM32CubeMX version: 4.11.0
STM32F746NGH6

Description:
It limits the PCLK1 to 50 MHz and PCLK2 to 100 MHz. See the RED error below:
weeor.JPG

However, The PCLK1 can reach 54 MHz and PCLK2 can reach 108 MHz after over-drive.
over.JPG

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