AnsweredAssumed Answered

HardFault_Handler on GUI_Init() when trying to use STEmWin with externalSDRAM on Core4x9 CooCox IDE

Question asked by rakamafaka on Nov 6, 2015
Latest reply on Nov 9, 2015 by rakamafaka
Hello, i try to start with extSDRAM with open4x9 board stm32f429IG. im Using a CooCox IDE. While i worked with internal SRAM everything was fine. But whe i try to work with external SDRAM(IS42SI6400) 64Mb, i meet a HardFault_Handler() in GUI_Init(). In debug mode i found that it is appears in emWin_LCD_Init(), that called after LCD_X_Config(). (also CooCox says that function LCD_X_DisplayDriver(unsigned LayerIndex, unsigned Cmd, void * pData) receives(0,0,0x0) but there is no command 0, is it normal?How a can start with external SDRAM?
I use simple code :
[code]GUIConf.c
.....
#if USE_SDRAM_AS_GUIMEM==1
#define GUI_NUMBYTES (1024*110)
#else
#define GUI_NUMBYTES (1024 * 100)
#endif

#if USE_SDRAM_AS_GUIMEM==1
U32 extMem[GUI_NUMBYTES / 4] __attribute__((section(".HeapMemSection")));
#else
U32 extMem[GUI_NUMBYTES / 4];
#endif
....

sdram.h
#define SDRAM_BANK_ADDR ((uint32_t)0xD0100000)

lcd.h
#define LCD_FRAME_BUFFER SDRAM_BANK_ADDR 
#define BUFFER_OFFSET ((uint32_t)0xC0000)

main.c
SystemInit();
LowLevel_Init();
/* Init the STemWin GUI Library */
GUI_Init();

LowLevel_Init()
{
GUI_X_Init();
GPIO_InitTypeDef GPIO_InitStructure;
UB_STemWIN_init();
/* Configure GPIO PC1 to set L3GD20 Chip Select to Reset */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
GPIO_Init(GPIOC, &GPIO_InitStructure);

/* Deselect : Chip Select high */
GPIO_SetBits(GPIOC, GPIO_Pin_1);
MX_GPIO_Init();

/* Initialize the SDRAM */
SDRAM_Init();

/* LCD initialization */
LCD_Init();

/* LCD Layer initialization */
LCD_LayerInit();

/* Enable the LTDC */
LTDC_Cmd(ENABLE);
LCD_SetLayer(LCD_FOREGROUND_LAYER);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
}
....
system_stm32f4xx.c
#define DATA_IN_ExtSRAM 1

link script 
rom (rx) : ORIGIN = 0x08000000, LENGTH = 0x00200000
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00030000
ram1 (rwx) : ORIGIN = 0x10000000, LENGTH = 0x00010000
.HeapMemSection : 
{
*(.HeapMemSection)
} > sdram
sdram (rwx) : ORIGIN = 0xD0100000, LENGTH = 0x00400000

[/code]

Outcomes