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Temporarily suspending SPI

Question asked by turk.andy on Dec 29, 2012
Latest reply on Dec 31, 2012 by crt
I've got a mixed-signal board with an LCD connected through noisy SPI lines. When the display is being updated, the analog readings are all over the place. In addition to improving the layout of the board, I'm also looking at suspending SPI activity while the ADCs are active.

I've got this more-or-less working at the moment by simply clearing the SPI's enable flag just before kicking off the ADCs and re-enabling it in the completion callback. To guard against an SPI transaction that's already underway, the ADC collects an extra filler sample at the beginning of it's run.

However, in 25.3.8 of RM0008 it says, "… disabling the SPI and entering the Halt mode while a transfer is ongoing can cause the current transfer to be corrupted …", which is rather ominous.

I haven't observed any corruption, but maybe that's just dumb luck. Or maybe the warning is more specifically to do with "halt mode" (which I'm assuming refers to the core, not just the SPI peripheral).

Have others throttled SPI like this before? How likely is this to blow up somewhere down the road with silicon revisions or other stuff hanging off the SPI bus?

PS. This is an F103 mcu and I'm using SPI2 in full-duplex master mode.
PPS. Oops, this got posted in the wrong forum. Sorry.