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stm8s003 timer1 as a delay timer

pdinar
Associate

‎2025-11-25 9:35 AM - last edited on ‎2025-12-22 12:04 AM by

Post edited by ST moderator to be inline with the community rules for the code sharing. In next time please use </> button to paste your code and a linker script content. Please read this post: How to insert source code.

Hi,

 

I am trying to use timer1 as a delay timer , but I cannot  seam to get the timer working, what am I doing wrong? following is the code for testing timer1 with overflow Interrupt. 

#include "iostm8s003.h"
#include <stdint.h>

/* ===================== Own peripheral structs ===================== */
/* ---------- CLK ---------- */
typedef struct {
volatile uint8_t ICKR; /* 0x50C0 */
volatile uint8_t ECKR; /* 0x50C1 */
uint8_t RESERVED1; /* 0x50C2 */
volatile uint8_t CMSR; /* 0x50C3 */
volatile uint8_t SWR; /* 0x50C4 */
volatile uint8_t SWCR; /* 0x50C5 */
volatile uint8_t CKDIVR; /* 0x50C6 */
volatile uint8_t PCKENR1; /* 0x50C7 */
volatile uint8_t CSSR; /* 0x50C8 */
volatile uint8_t CCOR; /* 0x50C9 */
volatile uint8_t PCKENR2; /* 0x50CA */
volatile uint8_t HSITRIMR; /* 0x50CB */
volatile uint8_t SWIMCCR; /* 0x50CC */
} CLK_TypeDef;

#define CLK ((CLK_TypeDef *)0x50C0)

/* ---------- TIM1 ---------- */
typedef struct {
volatile uint8_t CR1; /* 0x5250 */
volatile uint8_t CR2; /* 0x5251 */
volatile uint8_t SMCR; /* 0x5252 */
volatile uint8_t ETR; /* 0x5253 */
volatile uint8_t IER; /* 0x5254 */
volatile uint8_t SR1; /* 0x5255 */
volatile uint8_t SR2; /* 0x5256 */
volatile uint8_t EGR; /* 0x5257 */
volatile uint8_t CCMR1; /* 0x5258 */
volatile uint8_t CCMR2; /* 0x5259 */
volatile uint8_t CCMR3; /* 0x525A */
volatile uint8_t CCMR4; /* 0x525B */
volatile uint8_t CCER1; /* 0x525C */
volatile uint8_t CCER2; /* 0x525D */
volatile uint8_t CNTRH; /* 0x525E */
volatile uint8_t CNTRL; /* 0x525F */
volatile uint8_t PSCRH; /* 0x5260 */
volatile uint8_t PSCRL; /* 0x5261 */
volatile uint8_t ARRH; /* 0x5262 */
volatile uint8_t ARRL; /* 0x5263 */
volatile uint8_t RCR; /* 0x5264 */
volatile uint8_t CCR1H; /* 0x5265 */
volatile uint8_t CCR1L; /* 0x5266 */
volatile uint8_t CCR2H; /* 0x5267 */
volatile uint8_t CCR2L; /* 0x5268 */
volatile uint8_t CCR3H; /* 0x5269 */
volatile uint8_t CCR3L; /* 0x526A */
volatile uint8_t CCR4H; /* 0x526B */
volatile uint8_t CCR4L; /* 0x526C */
volatile uint8_t BKR; /* 0x526D */
volatile uint8_t DTR; /* 0x526E */
volatile uint8_t OISR; /* 0x526F */
} TIM1_TypeDef;

#define TIM1 ((TIM1_TypeDef *)0x5250)

/* ===================== Globals ===================== */
volatile uint32_t count = 0;
/* timer duration in seconds (change this to test) */
volatile uint32_t timercounter = 10UL;
volatile uint8_t timeout = 0;

/* ===================== Prototypes (required by -pxp) ===================== */
void main(void); /* forward declaration */

static void CLK_Config_16MHz(void);
static void GPIO_PD3_Config(void);
static void Initialise_Timer1(void);
static void Deintialize_Timer1(void);
static void Start_Timer1(void);
static void GIE_Enable(void); /* our own “enable interrupts” */

@far @interrupt void TIM1_UPD_OVF_BRK_IRQHandler(void);

/* ===================== Global interrupt enable ===================== */
static void GIE_Enable(void)
{
/* Cosmic inline asm: RIM (enable interrupts) */
__asm("rim\n");
}

/* ===================== Clock config: 16 MHz HSI ===================== */
static void CLK_Config_16MHz(void)
{
/* Enable HSI */
CLK->ICKR |= 0x01; /* HSIEN = 1 */
while ((CLK->ICKR & 0x02) == 0) { /* wait for HSIRDY */
/* wait */
}

/* No prescaler: fCPU = 16 MHz */
CLK->CKDIVR = 0x00;

/* Enable TIM1 clock (bit7 of PCKENR1) */
CLK->PCKENR1 |= 0x80;
}

/* ===================== GPIO: PD3 as LED output ===================== */
static void GPIO_PD3_Config(void)
{
/* PD3 output, push-pull, slow */
PD_DDR |= (1 << 3); /* output */
PD_CR1 |= (1 << 3); /* push-pull */
PD_CR2 &= ~(1 << 3); /* max 2 MHz */

/* LED ON at startup (active-high assumption) */
PD_ODR |= (1 << 3);
}

/* ===================== TIM1: 1-second tick ===================== */
/* 16 MHz / 1024 = 15625 Hz
* ARR = 15624 (0x3D08) ? (ARR+1)/15625 = 1s
*/
static void Initialise_Timer1(void)
{
TIM1->CR1 = 0x00;
TIM1->IER = 0x00;
TIM1->SR1 = 0x00;
TIM1->SR2 = 0x00;

/* Prescaler /1024 */
TIM1->PSCRH = 0x03;
TIM1->PSCRL = 0xFF;

/* Auto-reload for 1s period */
TIM1->ARRH = 0x3D;
TIM1->ARRL = 0x08;

/* Reset counter */
TIM1->CNTRH = 0x00;
TIM1->CNTRL = 0x00;

/* Enable update interrupt */
TIM1->IER |= 0x01; /* UIE */

/* Clear flags */
TIM1->SR1 = 0x00;
}

/* Turn everything TIM1-related off */
static void Deintialize_Timer1(void)
{
TIM1->CR1 = 0;
TIM1->IER = 0;
TIM1->SR1 = 0;
TIM1->SR2 = 0;
TIM1->CCER1 = 0;
TIM1->CCER2 = 0;
TIM1->CCMR1 = 0;
TIM1->CCMR2 = 0;
TIM1->CCMR3 = 0;

TIM1->CNTRH = 0;
TIM1->CNTRL = 0;
TIM1->PSCRH = 0;
TIM1->PSCRL = 0;
TIM1->ARRH = 0;
TIM1->ARRL = 0;
TIM1->CCR1H = 0;
TIM1->CCR1L = 0;
TIM1->CCR2H = 0;
TIM1->CCR2L = 0;
TIM1->CCR3H = 0;
TIM1->CCR3L = 0;
}

/* Start timer from zero */
static void Start_Timer1(void)
{
TIM1->CNTRH = 0x00;
TIM1->CNTRL = 0x00;

TIM1->CR1 |= 0x01; /* CEN = 1 */
}

/* ===================== TIM1 ISR ===================== */
@far @interrupt void TIM1_UPD_OVF_BRK_IRQHandler(void)
{
count++;

if (count >= timercounter)
{
TIM1->CR1 = 0x00; /* stop timer */
timeout = 1; /* signal to main */
count = 0; /* reset for next use */
}

/* Clear update flag */
TIM1->SR1 = 0x00;
}

/* ===================== main ===================== */
void main(void)
{
/* Example: 1 hour timeout; for quick test use small value */
timercounter = 3600UL; /* 3600 seconds = 1 hour */
/* timercounter = 10UL; */ /* uncomment for 10s test */

CLK_Config_16MHz();
GPIO_PD3_Config();
Initialise_Timer1();

GIE_Enable(); /* instead of enableInterrupts() macro */

Start_Timer1();

for (;;)
{
if (timeout)
{
timeout = 0;

/* Turn LED OFF on timeout */
PD_ODR &= ~(1 << 3);

/* Timer no longer needed */
Deintialize_Timer1();

/* If later you want another timer interval:
timercounter = NEW_SECONDS;
Initialise_Timer1();
GIE_Enable(); (only if you disabled interrupts elsewhere)
Start_Timer1();
*/
}

/* Your non-blocking application code can run here */
}
}

Following is the interrupt_vector.c 

/* BASIC INTERRUPT VECTOR TABLE FOR STM8S003 (Cosmic) */

#include "iostm8s003.h"

/* Type for interrupt handlers */
typedef void @far (*interrupt_handler_t)(void);

struct interrupt_vector {
unsigned char interrupt_instruction;
interrupt_handler_t interrupt_handler;
};

/* Default dummy handler */
@far @interrupt void NonHandledInterrupt(void)
{
/* Place breakpoint here if debugging unexpected interrupts */
return;
}

/* Startup routine (provided by Cosmic runtime) */
extern void _stext(void);

/* Our TIM1 ISR (defined in main.c) */
@far @interrupt void TIM1_UPD_OVF_BRK_IRQHandler(void);

/*
* Vector order for STM8S003:
* RESET
* TRAP
* irq0 - TLI
* irq1 - AWU
* irq2 - CLK
* irq3 - EXTI_PORTA
* irq4 - EXTI_PORTB
* irq5 - EXTI_PORTC
* irq6 - EXTI_PORTD
* irq7 - EXTI_PORTE
* irq8 - Reserved
* irq9 - Reserved
* irq10 - SPI
* irq11 - TIM1 update/overflow/trigger/break
* irq12 - TIM1 capture/compare
* irq13 - TIM2 update/overflow
* irq14 - TIM2 capture/compare
* irq15 - Reserved
* irq16 - Reserved
* irq17 - UART1 TX
* irq18 - UART1 RX
* irq19 - I2C
* irq20 - Reserved
* irq21 - Reserved
* irq22 - ADC1 end of conversion
* irq23 - TIM4 update/overflow
* irq24 - Flash EOP / write protection
* irq25–29 - Reserved
*/

struct interrupt_vector const _vectab[] = {
{0x82, (interrupt_handler_t)_stext}, /* reset */
{0x82, NonHandledInterrupt}, /* trap */

{0x82, NonHandledInterrupt}, /* irq0 - TLI */
{0x82, NonHandledInterrupt}, /* irq1 - AWU */
{0x82, NonHandledInterrupt}, /* irq2 - CLK */
{0x82, NonHandledInterrupt}, /* irq3 - EXTI_PORTA */
{0x82, NonHandledInterrupt}, /* irq4 - EXTI_PORTB */
{0x82, NonHandledInterrupt}, /* irq5 - EXTI_PORTC */
{0x82, NonHandledInterrupt}, /* irq6 - EXTI_PORTD */
{0x82, NonHandledInterrupt}, /* irq7 - EXTI_PORTE */
{0x82, NonHandledInterrupt}, /* irq8 - Reserved */
{0x82, NonHandledInterrupt}, /* irq9 - Reserved */
{0x82, NonHandledInterrupt}, /* irq10 - SPI */

{0x82, (interrupt_handler_t)TIM1_UPD_OVF_BRK_IRQHandler}, /* irq11 - TIM1 UPD/OVF/TRG/BRK */

{0x82, NonHandledInterrupt}, /* irq12 - TIM1 CAP/COM */
{0x82, NonHandledInterrupt}, /* irq13 - TIM2 UPD/OVF */
{0x82, NonHandledInterrupt}, /* irq14 - TIM2 CAP/COM */
{0x82, NonHandledInterrupt}, /* irq15 - Reserved */
{0x82, NonHandledInterrupt}, /* irq16 - Reserved */
{0x82, NonHandledInterrupt}, /* irq17 - UART1 TX */
{0x82, NonHandledInterrupt}, /* irq18 - UART1 RX */
{0x82, NonHandledInterrupt}, /* irq19 - I2C */
{0x82, NonHandledInterrupt}, /* irq20 - Reserved */
{0x82, NonHandledInterrupt}, /* irq21 - Reserved */
{0x82, NonHandledInterrupt}, /* irq22 - ADC1 */
{0x82, NonHandledInterrupt}, /* irq23 - TIM4 UPD/OVF */
{0x82, NonHandledInterrupt}, /* irq24 - Flash EOP/PG_DIS */
{0x82, NonHandledInterrupt}, /* irq25 - Reserved */
{0x82, NonHandledInterrupt}, /* irq26 - Reserved */
{0x82, NonHandledInterrupt}, /* irq27 - Reserved */
{0x82, NonHandledInterrupt}, /* irq28 - Reserved */
{0x82, NonHandledInterrupt} /* irq29 - Reserved */
};

any pointer as to why the timer1 does not work would be great help.

Thanks and Regards

main.c
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2 REPLIES 2
AA1
Senior III

‎2025-12-06 2:29 AM

You should start with a simple case. Don't use interrupts.

How do you know it doesn't work?

 

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pdinar
Associate
In response to AA1

‎2025-12-21 10:42 PM

I did test timer1 with polling and it worked, but could not get  timer1 to work with overflow interrupt.  I did get the Timer1 working in non blocking ( overflow Interrupt) format. I am attaching working code here as there is no much help for timer1 on most of the webpages . Hoping this helps others who are struggling with timer1 in stm8s series. 

main.c

#include "iostm8s003.h"
#include <stdint.h>
#include "timer1.h"

/* ===================== Local CLK struct (for main) ===================== */
typedef struct {
volatile uint8_t ICKR; /* 0x50C0 */
volatile uint8_t ECKR; /* 0x50C1 */
uint8_t RESERVED1; /* 0x50C2 */
volatile uint8_t CMSR; /* 0x50C3 */
volatile uint8_t SWR; /* 0x50C4 */
volatile uint8_t SWCR; /* 0x50C5 */
volatile uint8_t CKDIVR; /* 0x50C6 */
volatile uint8_t PCKENR1; /* 0x50C7 */
volatile uint8_t CSSR; /* 0x50C8 */
volatile uint8_t CCOR; /* 0x50C9 */
volatile uint8_t PCKENR2; /* 0x50CA */
volatile uint8_t HSITRIMR; /* 0x50CB */
volatile uint8_t SWIMCCR; /* 0x50CC */
} CLK_TypeDef;

#define CLK ((CLK_TypeDef *)0x50C0)

/* ===================== Prototypes required by -pxp ===================== */
void main(void);

static void CLK_Config_16MHz(void);
static void GPIO_PD3_Config(void);
static void GIE_Enable(void);

/* ===================== Global interrupt enable ===================== */
static void GIE_Enable(void)
{
_asm("rim\n"); /* Cosmic: enable interrupts */
}

/* ===================== Clock config: 16 MHz HSI ===================== */
static void CLK_Config_16MHz(void)
{
/* Enable HSI */
CLK->ICKR |= 0x01; /* HSIEN = 1 */
while ((CLK->ICKR & 0x02) == 0) { /* wait for HSIRDY */
/* wait */
}

/* No prescaler: fCPU = 16 MHz */
CLK->CKDIVR = 0x00;

/* NOTE: timer1.c will enable the TIM1 clock in CLK->PCKENR1 */
}

/* ===================== GPIO: PD3 as LED output ===================== */
static void GPIO_PD3_Config(void)
{
/* PD3 as push-pull output, slow */
PD_DDR |= (1 << 3); /* output */
PD_CR1 |= (1 << 3); /* push-pull */
PD_CR2 &= ~(1 << 3); /* slow mode */

/* LED ON at startup */
PD_ODR |= (1 << 3);
}

/* ===================== main ===================== */
void main(void)
{
CLK_Config_16MHz();
GPIO_PD3_Config();

/* Initialise TIM1 for 1-second ticks */
TIMER1_Init_1sTick();

/* Set desired duration here (in seconds) */
TIMER1_Start(20UL); /* 120 seconds = 2 minutes test */
/* e.g.: TIMER1_Start(10UL); // 10 s
TIMER1_Start(3600UL); // 1 hour
TIMER1_Start(9UL * 3600UL); // 9 hours
*/

GIE_Enable(); /* enable global interrupts */

for (;;)
{
if (TIMER1_HasExpired())
{
TIMER1_ClearFlag();

/* Timer expired: turn LED OFF */
PD_ODR &= ~(1 << 3);

TIMER1_Stop();

/* stay here or do other work; timer is stopped */
}

/* Other non-blocking code can go here */
}
}

  timer1.c

#include "iostm8s003.h"
#include <stdint.h>
#include "timer1.h"

/* ===================== Own peripheral structs ===================== */
/* ---------- CLK ---------- */
typedef struct {
volatile uint8_t ICKR; /* 0x50C0 */
volatile uint8_t ECKR; /* 0x50C1 */
uint8_t RESERVED1; /* 0x50C2 */
volatile uint8_t CMSR; /* 0x50C3 */
volatile uint8_t SWR; /* 0x50C4 */
volatile uint8_t SWCR; /* 0x50C5 */
volatile uint8_t CKDIVR; /* 0x50C6 */
volatile uint8_t PCKENR1; /* 0x50C7 */
volatile uint8_t CSSR; /* 0x50C8 */
volatile uint8_t CCOR; /* 0x50C9 */
volatile uint8_t PCKENR2; /* 0x50CA */
volatile uint8_t HSITRIMR; /* 0x50CB */
volatile uint8_t SWIMCCR; /* 0x50CC */
} CLK_TypeDef;

#define CLK ((CLK_TypeDef *)0x50C0)

/* ---------- TIM1 ---------- */
typedef struct {
volatile uint8_t CR1; /* 0x5250 */
volatile uint8_t CR2; /* 0x5251 */
volatile uint8_t SMCR; /* 0x5252 */
volatile uint8_t ETR; /* 0x5253 */
volatile uint8_t IER; /* 0x5254 */
volatile uint8_t SR1; /* 0x5255 */
volatile uint8_t SR2; /* 0x5256 */
volatile uint8_t EGR; /* 0x5257 */
volatile uint8_t CCMR1; /* 0x5258 */
volatile uint8_t CCMR2; /* 0x5259 */
volatile uint8_t CCMR3; /* 0x525A */
volatile uint8_t CCMR4; /* 0x525B */
volatile uint8_t CCER1; /* 0x525C */
volatile uint8_t CCER2; /* 0x525D */
volatile uint8_t CNTRH; /* 0x525E */
volatile uint8_t CNTRL; /* 0x525F */
volatile uint8_t PSCRH; /* 0x5260 */
volatile uint8_t PSCRL; /* 0x5261 */
volatile uint8_t ARRH; /* 0x5262 */
volatile uint8_t ARRL; /* 0x5263 */
volatile uint8_t RCR; /* 0x5264 */
volatile uint8_t CCR1H; /* 0x5265 */
volatile uint8_t CCR1L; /* 0x5266 */
volatile uint8_t CCR2H; /* 0x5267 */
volatile uint8_t CCR2L; /* 0x5268 */
volatile uint8_t CCR3H; /* 0x5269 */
volatile uint8_t CCR3L; /* 0x526A */
volatile uint8_t CCR4H; /* 0x526B */
volatile uint8_t CCR4L; /* 0x526C */
volatile uint8_t BKR; /* 0x526D */
volatile uint8_t DTR; /* 0x526E */
volatile uint8_t OISR; /* 0x526F */
} TIM1_TypeDef;

#define TIM1 ((TIM1_TypeDef *)0x5250)

/* ===================== Module globals ===================== */

volatile uint8_t g_timer1_timeout_flag = 0;
volatile uint32_t g_timer1_seconds_remaining = 0;

/* ===================== Internal prototypes ===================== */
@far @interrupt void TIM1_UPD_OVF_BRK_IRQHandler(void);

/* ===================== Public API ===================== */

void TIMER1_Init_1sTick(void)
{
/* Enable TIM1 clock (bit7 of PCKENR1).
* Assumes rest of system clock is already 16 MHz.
*/
CLK->PCKENR1 |= 0x80;

/* Basic TIM1 configuration for 1-second update interrupt */
TIM1->CR1 = 0x00;
TIM1->CR2 = 0x00;
TIM1->SMCR = 0x00;
TIM1->IER = 0x00;
TIM1->SR1 = 0x00;
TIM1->SR2 = 0x00;

/* Prescaler /1024: 16 MHz / 1024 = 15625 Hz */
TIM1->PSCRH = 0x03;
TIM1->PSCRL = 0xFF;

/* ARR = 15624 (0x3D08) -> 1 second period */
TIM1->ARRH = 0x3D;
TIM1->ARRL = 0x08;

/* Reset counter */
TIM1->CNTRH = 0x00;
TIM1->CNTRL = 0x00;

/* Generate an update event to load PSC & ARR */
TIM1->EGR = 0x01; /* UG */

/* Do NOT start counter yet; done in TIMER1_Start() */
}

void TIMER1_Start(uint32_t seconds)
{
/* Set countdown value and clear timeout flag */
g_timer1_seconds_remaining = seconds;
g_timer1_timeout_flag = 0;

/* Reset counter */
TIM1->CNTRH = 0x00;
TIM1->CNTRL = 0x00;

/* Enable update interrupt */
TIM1->IER |= 0x01; /* UIE */

/* Clear pending flags */
TIM1->SR1 = 0x00;

/* Start timer (CEN = 1) */
TIM1->CR1 |= 0x01;
}

void TIMER1_Stop(void)
{
/* Stop counting */
TIM1->CR1 &= (uint8_t)~0x01; /* CEN = 0 */
TIM1->IER &= (uint8_t)~0x01; /* UIE = 0 */

/* Optionally: clear flags (not strictly required) */
TIM1->SR1 = 0x00;
TIM1->SR2 = 0x00;
}

uint8_t TIMER1_HasExpired(void)
{
return g_timer1_timeout_flag;
}

void TIMER1_ClearFlag(void)
{
g_timer1_timeout_flag = 0;
}

uint32_t TIMER1_GetRemaining(void)
{
return g_timer1_seconds_remaining;
}

/* ===================== TIM1 ISR ===================== */
/* IRQ11: TIM1 update/overflow/trigger/break */
@far @interrupt void TIM1_UPD_OVF_BRK_IRQHandler(void)
{
if (g_timer1_seconds_remaining > 0)
{
g_timer1_seconds_remaining--; /* one second elapsed */

if (g_timer1_seconds_remaining == 0)
{
/* Stop the timer and raise timeout flag */
TIM1->CR1 &= (uint8_t)~0x01; /* CEN = 0 */
g_timer1_timeout_flag = 1;
}
}

/* Clear update flag */
TIM1->SR1 = 0x00;
}

 

timer1.h

#ifndef TIMER1_H
#define TIMER1_H

#include <stdint.h>

/* Public flag: set to 1 when Timer1 countdown reaches 0 */
extern volatile uint8_t g_timer1_timeout_flag;

/* Optional: remaining seconds (read-only for app) */
extern volatile uint32_t g_timer1_seconds_remaining;

/* --------------------------------------------------------------------
* Initialize TIM1 for a 1-second update interrupt.
*
* - Assumes system clock is already configured for 16 MHz.
* - Only sets up TIM1 registers and enables its peripheral clock.
* - Does NOT start the timer.
* ------------------------------------------------------------------*/
void TIMER1_Init_1sTick(void);

/* --------------------------------------------------------------------
* Start a countdown of <seconds>.
*
* - seconds = number of 1-second ticks before timeout.
* - Resets remaining seconds and clears timeout flag.
* - Enables TIM1 update interrupt and starts the counter.
* ------------------------------------------------------------------*/
void TIMER1_Start(uint32_t seconds);

/* --------------------------------------------------------------------
* Stop TIM1 (does not clear timeout flag).
* ------------------------------------------------------------------*/
void TIMER1_Stop(void);

/* --------------------------------------------------------------------
* Returns non-zero if the timer has expired (timeout occurred).
* Same as reading g_timer1_timeout_flag.
* ------------------------------------------------------------------*/
uint8_t TIMER1_HasExpired(void);

/* --------------------------------------------------------------------
* Clear the timeout flag (e.g., after handling the event).
* ------------------------------------------------------------------*/
void TIMER1_ClearFlag(void);

/* --------------------------------------------------------------------
* Get remaining seconds (snapshot).
* ------------------------------------------------------------------*/
uint32_t TIMER1_GetRemaining(void);

#endif /* TIMER1_H */

 

interrupt_vector.c 

#include "iostm8s003.h"

typedef void @far (*interrupt_handler_t)(void);

struct interrupt_vector {
unsigned char interrupt_instruction;
interrupt_handler_t interrupt_handler;
};

@far @interrupt void NonHandledInterrupt(void)
{
return;
}

/* startup routine from Cosmic */
extern void _stext(void);

/* Timer1 ISR implemented in timer1.c */
@far @interrupt void TIM1_UPD_OVF_BRK_IRQHandler(void);

struct interrupt_vector const _vectab[] = {
{0x82, (interrupt_handler_t)_stext}, /* reset */
{0x82, NonHandledInterrupt}, /* trap */

{0x82, NonHandledInterrupt}, /* irq0 - TLI */
{0x82, NonHandledInterrupt}, /* irq1 - AWU */
{0x82, NonHandledInterrupt}, /* irq2 - CLK */
{0x82, NonHandledInterrupt}, /* irq3 - EXTI_PORTA */
{0x82, NonHandledInterrupt}, /* irq4 - EXTI_PORTB */
{0x82, NonHandledInterrupt}, /* irq5 - EXTI_PORTC */
{0x82, NonHandledInterrupt}, /* irq6 - EXTI_PORTD */
{0x82, NonHandledInterrupt}, /* irq7 - EXTI_PORTE */
{0x82, NonHandledInterrupt}, /* irq8 - Reserved */
{0x82, NonHandledInterrupt}, /* irq9 - Reserved */
{0x82, NonHandledInterrupt}, /* irq10 - SPI */

{0x82, (interrupt_handler_t)TIM1_UPD_OVF_BRK_IRQHandler}, /* irq11 - TIM1 UPD/OVF/TRG/BRK */

{0x82, NonHandledInterrupt}, /* irq12 - TIM1 CAP/COM */
{0x82, NonHandledInterrupt}, /* irq13 - TIM2 UPD/OVF */
{0x82, NonHandledInterrupt}, /* irq14 - TIM2 CAP/COM */
{0x82, NonHandledInterrupt}, /* irq15 - Reserved */
{0x82, NonHandledInterrupt}, /* irq16 - Reserved */
{0x82, NonHandledInterrupt}, /* irq17 - UART1 TX */
{0x82, NonHandledInterrupt}, /* irq18 - UART1 RX */
{0x82, NonHandledInterrupt}, /* irq19 - I2C */
{0x82, NonHandledInterrupt}, /* irq20 - Reserved */
{0x82, NonHandledInterrupt}, /* irq21 - Reserved */
{0x82, NonHandledInterrupt}, /* irq22 - ADC1 */
{0x82, NonHandledInterrupt}, /* irq23 - TIM4 UPD/OVF */
{0x82, NonHandledInterrupt}, /* irq24 - FLASH EOP/WR_PG_DIS */
{0x82, NonHandledInterrupt}, /* irq25 - Reserved */
{0x82, NonHandledInterrupt}, /* irq26 - Reserved */
{0x82, NonHandledInterrupt}, /* irq27 - Reserved */
{0x82, NonHandledInterrupt}, /* irq28 - Reserved */
{0x82, NonHandledInterrupt} /* irq29 - Reserved */
};

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