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TIMER 1, PWM on channel 2, on pulse mode and external trigger ETR1

DFran.1
Associate

Hello

The tools i'm using: STM32CUBEIDE, a scope and an AFG for generating a 5ms pulse each 20ms (50Hz PWM signal on ETR1)

The goal is to start each pwm pulse from the trigger detection with the timer pwm in one pulse mode

Later, I will use the timer trigger ISR to start the ADC

I'm using an STM32f407IGT6 base board with the minimal request and a jtag 5 wires debuging interface

The Combined Reset Trigger Mode option mode does not exist for this device in cubeMX.

So i use the Reset mode with ETR1 as trigger source, pwm generation on channel 2 with the one pulse mode option.

Here is the clock configuration

0693W000000WSTZQA4.png

When i test the code, the CC interrupt has no problem to go in the ISR, the breakpoint was working.

But the trigger ISR is not working.

The TIE bit in DIER register is set and when a falling edge occur on ETR1 pin, the TIF bit is set in the SR register but the programm is no executing the ISR.

The code genarated by the MX inside the IDE for the timer init is the folowing:

/**

 * @brief TIM1 Initialization Function

 * @param None

 * @retval None

 */

static void MX_TIM1_Init(void)

{

 /* USER CODE BEGIN TIM1_Init 0 */

 /* USER CODE END TIM1_Init 0 */

 TIM_ClockConfigTypeDef sClockSourceConfig = {0};

 TIM_SlaveConfigTypeDef sSlaveConfig = {0};

 TIM_MasterConfigTypeDef sMasterConfig = {0};

 TIM_OC_InitTypeDef sConfigOC = {0};

 TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};

 /* USER CODE BEGIN TIM1_Init 1 */

 /* USER CODE END TIM1_Init 1 */

 htim1.Instance = TIM1;

 htim1.Init.Prescaler = 840;

 htim1.Init.CounterMode = TIM_COUNTERMODE_UP;

 htim1.Init.Period = 4000;

 htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;

 htim1.Init.RepetitionCounter = 0;

 htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;

 if (HAL_TIM_Base_Init(&htim1) != HAL_OK)

 {

   Error_Handler();

 }

 sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;

 if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)

 {

   Error_Handler();

 }

 if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)

 {

   Error_Handler();

 }

 if (HAL_TIM_OnePulse_Init(&htim1, TIM_OPMODE_SINGLE) != HAL_OK)

 {

   Error_Handler();

 }

 sSlaveConfig.SlaveMode = TIM_SLAVEMODE_RESET;

 sSlaveConfig.InputTrigger = TIM_TS_ETRF;

 sSlaveConfig.TriggerPolarity = TIM_TRIGGERPOLARITY_INVERTED;

 sSlaveConfig.TriggerPrescaler = TIM_TRIGGERPRESCALER_DIV1;

 sSlaveConfig.TriggerFilter = 0x0;

 if (HAL_TIM_SlaveConfigSynchro(&htim1, &sSlaveConfig) != HAL_OK)

 {

   Error_Handler();

 }

 sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;

 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE;

 if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)

 {

   Error_Handler();

 }

 sConfigOC.OCMode = TIM_OCMODE_PWM1;

 sConfigOC.Pulse = 1000;

 sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;

 sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;

 sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;

 sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;

 sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;

 if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)

 {

   Error_Handler();

 }

 sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;

 sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;

 sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;

 sBreakDeadTimeConfig.DeadTime = 0;

 sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;

 sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;

 sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;

 if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /* USER CODE BEGIN TIM1_Init 2 */

 /* USER CODE END TIM1_Init 2 */

 HAL_TIM_MspPostInit(&htim1);

}

The main program:

 /* Infinite loop */

 /* USER CODE BEGIN WHILE */

 HAL_GPIO_WritePin(GPIOG, GPIO_PIN_3, SET);

 HAL_TIM_PWM_Start_IT(&htim1, TIM_CHANNEL_2);

 __HAL_TIM_ENABLE_IT(&htim1,TIM_IT_CC1);

 __HAL_TIM_ENABLE_IT(&htim1,TIM_IT_TRIGGER);

 while (1)

 {

   /* USER CODE END WHILE */

   /* USER CODE BEGIN 3 */

 }

 /* USER CODE END 3 */

}

And the timer 1 ISRs:

/******************************************************************************/

/* STM32F4xx Peripheral Interrupt Handlers                                   */

/* Add here the Interrupt Handlers for the used peripherals.                 */

/* For the available peripheral interrupt handler names,                     */

/* please refer to the startup file (startup_stm32f4xx.s).                   */

/******************************************************************************/

/**

 * @brief This function handles TIM1 break interrupt and TIM9 global interrupt.

 */

void TIM1_BRK_TIM9_IRQHandler(void)

{

 /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 0 */

 /* USER CODE END TIM1_BRK_TIM9_IRQn 0 */

 HAL_TIM_IRQHandler(&htim1);

 /* USER CODE BEGIN TIM1_BRK_TIM9_IRQn 1 */

 /* USER CODE END TIM1_BRK_TIM9_IRQn 1 */

}

/**

 * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.

 */

void TIM1_UP_TIM10_IRQHandler(void)

{

 /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */

 /* USER CODE END TIM1_UP_TIM10_IRQn 0 */

 HAL_TIM_IRQHandler(&htim1);

 /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */

 /* USER CODE END TIM1_UP_TIM10_IRQn 1 */

}

/**

 * @brief This function handles TIM1 trigger and commutation interrupts and TIM11 global interrupt.

 */

void TIM1_TRG_COM_TIM11_IRQHandler(void)

{

 /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */

 /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */

 HAL_TIM_IRQHandler(&htim1); ----> break point in debugger

 /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */

 /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */

}

/**

 * @brief This function handles TIM1 capture compare interrupt.

 */

void TIM1_CC_IRQHandler(void)

{

 /* USER CODE BEGIN TIM1_CC_IRQn 0 */

   HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_3); ----> break point in debugger

 /* USER CODE END TIM1_CC_IRQn 0 */

 HAL_TIM_IRQHandler(&htim1);

 /* USER CODE BEGIN TIM1_CC_IRQn 1 */

 /* USER CODE END TIM1_CC_IRQn 1 */

}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

I'll continue to search but it will be very kind of you if somebody can take a look and see wath's wrong.

Thanks and best reguards.

François.

1 REPLY 1
TDK
Guru

> The TIE bit in DIER register is set and when a falling edge occur on ETR1 pin, the TIF bit is set in the SR register but the program is no executing the ISR.

The only other thing needed is to ensure the TIM1_TRG_COM_TIM11_IRQHandler IRQ is enabled in NVIC. Might want to verify that as well, possible it's missed in HAL.

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