What Device Tree/Configuration of USART/UART does the MP2xROMtracesdump have?

[DMårt]

I have built a custom board by using STM32MP257F and I want to boot on USART6. 

I have not succeed to boot on USART6 when I compile my own fsbla by change the device tree of TF-A.

I got a suggestion from ST Dev team to run this ROM tracedump wiki-stm32mp-addons/MP2RomTracesDump at 6.1.0 · STMicroelectronics/wiki-stm32mp-addons · GitHub and it gave me a positive output on USART6. 

The soldering was OK. The BootROM was OK and the UART6 was alive. This is the output from my USART6.

===================================================
== STM32MP25 cut2.x bootrom display traces V1.01 ==
== Date of compilation : Jun 26 2024 - 11:25:23  ==
===================================================
Executed on Cortex A35 - Aarch64
Successfully booted on interface SD instance 1
Reset reason : POR reset
Chip state : CLOSED_UNLOCKED
==================================================================
Bootrom traces
==================================================================

[INFO] - BOOTCORE_FreezeIWDG12Clocks >
[INFO] - BOOTCORE_HwResetPOR >
[INFO] - BOOTCORE_VarLastValidAppRstMask ( 0x00000015 ) >
[INFO] - BOOTCORE_VarLastValidCpu1RstMask ( 0x00000003 ) >
[INFO] - BOOTCORE_VarLastValidPwrResetSource ( 0x00000000 ) >
[INFO] - BOOTCORE_ValRegHwRstSclrr ( 0x00000000 ) >
[INFO] - BOOTCORE_ValRegC1HwRstSclrr ( 0x00000000 ) >
[INFO] - BOOTCORE_ValRegC1BootRstSclrr ( 0x00002035 ) >
[INFO] - BOOTCORE_ChipModeClosedUnlocked >
[INFO] - BOOTCORE_LogicalResetSystem >
[INFO] - BOOTCORE_BootActionSecureBootProcess >
[INFO] - BOOTCORE_BootPinsSrcSel ( 0x00000001 ) >
[INFO] - BOOTCORE_BootCfgOtpWordValue ( 0x00000000, 0x00000000, 0x00000000 ) >
[INFO] - BOOTCORE_OtpBootpinLayoutSrc ( 0x00000000 ) >
[INFO] - BOOTCORE_OtpSrcSel ( 0x00000000 ) >
[INFO] - BOOTCORE_BootSrcIndexByBootPins ( 0x00000001 ) >
[INFO] - BOOTCORE_BootSrcIndex ( 0x00000001 ) >
[INFO] - BOOTCORE_SRCSEL_A35_SDCARD_SDMMC1_SDCARD_SDMMC1 >
[INFO] - BOOTCORE_OtpBootSrcDisableMaskVal ( 0x00000000 ) >
[INFO] - BOOTCORE_OtpBootUartInstanceDisableMaskVal ( 0x00000000 ) >
[INFO] - CSPID_CSPDEVICE ( 0x00000003 ) >
[INFO] - BOOTCORE_BootCfgAfmuxOtpWord1Value ( 0x00000000 ) >
[INFO] - BOOTCORE_BootCfgAfmuxOtpWord2Value ( 0x00000000 ) >
[INFO] - BOOTCORE_BootCfgAfmuxOtpWord3Value ( 0x00000000 ) >
[INFO] - BOOTCORE_BootCfgHseValue ( 0x00000000 ) >
[INFO] - BOOTCORE_EnabledSrcMaskVal ( 0x00000688 ) >
[INFO] - BOOTCORE_BootCfgHseValue ( 0x00000000 ) >
[INFO] - BOOTCORE_WDGStartAndUnfreeze >
[INFO] - BOOTCORE_UnFreezeIWDG12Clocks >
[INFO] - BOOTCORE_BootModeSECUREBOOT >
[INFO] - BOOTCORE_SecureBootLoadFsblA >
[INFO] - BOOTCORE_StartupWaitTime >
[INFO] - BOOTCORE_Pll14StartBegin >
[INFO] - BOOTCORE_NoCpuPllOtpBitValue ( 0x00000000 ) >
[INFO] - BOOTCORE_Pll1Locked >
[INFO] - BOOTCORE_CkMpuSwitchedOnPll1 >
[INFO] - BOOTCORE_Pll4Locked >
[INFO] - BOOTCORE_CkAxiSwitchedOnPll4 >
[INFO] - FLASHBOOT_HandleInit ( 0x00000003 ) >
[INFO] - SD_CardDetected >
[INFO] - SD_HighCapacityCardSDHCOrSDXC >
[INFO] - SD_TryFSBL1 >
[INFO] - SD_GPTFound >
[INFO] - SD_FsblsFound ( 0x00004400, 0x00044400 ) >
[INFO] - DWNLDMGR_FoundPaddingHeader >
[INFO] - SECBOOTCUSTOM_EnableDataCache >
[INFO] - SECBOOT_AuthenticationExtensionHeaderMissing >
[INFO] - SECBOOT_AuthImageLength ( 0x0000E400 ) >
[INFO] - SECBOOT_AuthImageEntryPoint ( 0x0E002600 ) >
[INFO] - SECBOOT_AuthDecisionIsJumpToImage >
[INFO] - SECBOOTCUSTOM_DisableDataCache >
[INFO] - BOOTCORE_AARCH64BootReq >
==================================================================

Question:

I'm planning to use USART6 as early debugging but I need to know what settings the ROMtracedump had for displaying and using USART6.

My Device Tree for TF-A have this following setting. But still, this won't work. I don't know why it won't work. Perhaps if I could know the settings fom the ROMtracedump, then I could understand why the USART6 is working as early debugging and not for my Device Tree for TF-A.

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
 * Copyright (C) 2026, STMicroelectronics - All Rights Reserved
 * Author: STM32CubeMX code generation for STMicroelectronics.
 */

/* For more information on Device Tree configuration, please refer to
 * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
 */

/dts-v1/;

#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include <dt-bindings/clock/stm32mp25-clksrc.h>
*#include "stm32mp25-mx.dtsi"*

#include "stm32mp257.dtsi"
#include "stm32mp25xf.dtsi"
#include "stm32mp257f-firmware-mx-rcc.dtsi"
#include "stm32mp25xxak-pinctrl.dtsi"
#include "stm32mp25-ddr.dtsi"

/* USER CODE BEGIN includes */
/* USER CODE END includes */

/ {
	model = "STMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11";
	compatible = "st,stm32mp257f-firmware-mx", "st,stm32mp257";

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x00000001 0x00000000>;

		/* USER CODE BEGIN memory */
		/* USER CODE END memory */
	};

	/* USER CODE BEGIN root */
	
	aliases{
		serial0 = &usart6;
	};

	chosen{
		stdout-path = "serial0:115200n8";
	};

	clocks {
		clk_hse: clk-hse {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
		};
	};
	
	/* USER CODE END root */

}; /*root*/

&pinctrl {
	i2c7_pins_mx: i2c7_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 14, AF10)>, /* I2C7_SDA */
					 <STM32_PINMUX('D', 15, AF10)>; /* I2C7_SCL */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	sdmmc1_pins_mx: sdmmc1_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
					 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
					 <STM32_PINMUX('E', 2, AF10)>, /* SDMMC1_CMD */
					 <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
					 <STM32_PINMUX('E', 5, AF10)>; /* SDMMC1_D1 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
	};

	usart6_pins_mx: usart6_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('F', 13, AF3)>; /* USART6_TX */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('F', 14, AF3)>; /* USART6_RX */
			bias-disable;
			drive-push-pull;
		};
	};

	/* USER CODE BEGIN pinctrl */
	/* USER CODE END pinctrl */
};

&pinctrl_z {
	/* USER CODE BEGIN pinctrl_z */
	/* USER CODE END pinctrl_z */
};

&bsec {
	status = "okay";

	/* USER CODE BEGIN bsec */
	board_id: board_id@3d8 {
		reg = <0x3d8 0x4>;
	};
	/* USER CODE END bsec */
};

&ddr {
	status = "okay";

	/* USER CODE BEGIN ddr */
	vdd1-supply = <&vdd1_ddr>;
	vdd2-supply = <&vdd2_ddr>;
	vddq-supply = <&vdd2_ddr>;
	/* USER CODE END ddr */
};

&hash {
	status = "disable";

	/* USER CODE BEGIN hash */
	/* USER CODE END hash */
};

&i2c7 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c7_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c7 */
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	pmic2: stpmic@33 {
		compatible = "st,stpmic2";
		reg = <0x33>;
		status = "okay";

		regulators {
			compatible = "st,stpmic2-regulators";

			vddcpu: buck1 {
				regulator-name = "vddcpu";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <910000>;
				regulator-always-on;
			};
			vddcore: buck2 {
				regulator-name = "vddcore";
				regulator-min-microvolt = <820000>;
				regulator-max-microvolt = <820000>;
				regulator-always-on;
			};
			vddgpu: buck3 {
				regulator-name = "vddgpu";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <900000>;
				regulator-always-on;
			};
			vddio_pmic: buck4 {
				regulator-name = "vddio_pmic";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			v1v8: buck5 {
				regulator-name = "v1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};
			vdd2_ddr: buck6 {
				regulator-name = "vdd2_ddr";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
			};
			v3v3: buck7 {
				regulator-name = "v3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			vdda1v8_aon: ldo1 {
				regulator-name = "vdda1v8_aon";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};
			vdd_emmc: ldo2 {
				regulator-name = "vdd_SD_card_temporary";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			vdd1_ddr: ldo3 {
				regulator-name = "vdd1_ddr";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};
			vdd3v3_usb: ldo4 {
				regulator-name = "vdd3v3_usb";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			v5v_hdmi: ldo5 {
				regulator-name = "v5v_hdmi";
				regulator-min-microvolt = <2000000>;
				regulator-max-microvolt = <2000000>;
			};
			vdd_sdcard: ldo7 {
				regulator-name = "vdd_sdcard";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			vddio_sdcard: ldo8 {
				regulator-name = "vddio_sdcard";
				st,regulator-bypass-microvolt = <3300000>;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
	/* USER CODE END i2c7 */
};

&iwdg1 {
	status = "disable";

	/* USER CODE BEGIN iwdg1 */
	timeout-sec = <32>;
	/* USER CODE END iwdg1 */
};

&pka {
	status = "disable";

	/* USER CODE BEGIN pka */
	/* USER CODE END pka */
};

&rcc {
	status = "okay";

	/* USER CODE BEGIN rcc */
	/* USER CODE END rcc */
};

&rng {
	status = "disable";

	/* USER CODE BEGIN rng */
	/* USER CODE END rng */
};

&saes {
	status = "disable";

	/* USER CODE BEGIN saes */
	/* USER CODE END saes */
};

&sdmmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc1_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc1 */
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&vdd_sdcard>;
	vqmmc-supply = <&vddio1>;
	/delete-property/ cap-sd-highspeed;
	/delete-property/ cap-mmc-highspeed;
	/* USER CODE END sdmmc1 */
};

&usart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&usart6_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN usart6 */
	/* USER CODE END usart6 */
};

/* USER CODE BEGIN addons */
/* USER CODE END addons */

[PatrickF · Accepted solution]

Hi, 

MP2RomTracesDump is a bare-metal SW, not using Device Tree.

Have you looked in details this post ? 

https://community.st.com/t5/stm32-mpus-products-and-hardware/change-default-tf-a-and-u-boot-serial-linux-console/m-p/195027/highlight/true#M5675

Regards.

[DMårt]

Hi @PatrickF 

I have look at the details of this post.

The ETZPC is only available for MP1.

Do you think op-tee is blocking TF-A? Like something is blocking USART6.

It seems that a lot of people on this forum having issues with USART6 when I reading the threads.

[DMårt]

I found an weird bug. I cannot change this value. Even if it's wrong.

[Kevin HUBER]

Hello @DMårt 

To fix the wrong memclk value in your DDR configuration, you have to go in "Clock Configuration" tab and update the clock divider going "To DDR", around PLL2 clock mux.

Hope it helps,

BR,

Kevin

[DMårt]

Hi @Kevin HUBER 

I have set my DDR to 600 MHz in the clock configuration tab so the memclk becomes 1200 MHz.

I will now see if USART6 is working as early boot debug. Perhaps not...

Edit:

It did not work.

[PatrickF]

Hi,

maybe an interesting wiki page on the UART subject.

https://wiki.st.com/stm32mpu/wiki/How_to_debug_TF-A_BL2#Debug_with_traces

Note: DDR wrong setting or else should not hamper some of TF-A UART messages.

Regards.

[DMårt]

Hi @PatrickF @Kevin HUBER 

I did that. But no text at the bootup. Nothing at all.

I have enabled usart6 at my device tree.

The USART6 is using HSI_KER clock at 64 MHz in CubeMX.

/* For UART crash console */
#define STM32MP_DEBUG_USART_CLK_FRQ		64000000
/* USART6 on HSI@64MHz, TX on PF13 Alternate 8 */
#define STM32MP_DEBUG_USART_BASE		USART6_BASE
#define DEBUG_UART_TX_GPIO_BANK_ADDRESS		GPIOF_BASE
#define DEBUG_UART_TX_GPIO_BANK_CLK_REG		RCC_GPIOFCFGR
#define DEBUG_UART_TX_GPIO_BANK_CLK_EN		RCC_GPIOxCFGR_GPIOxEN
#define DEBUG_UART_TX_GPIO_PORT			13
#define DEBUG_UART_TX_GPIO_ALTERNATE		8
#define DEBUG_UART_TX_CLKSRC_REG		RCC_XBAR8CFGR
#define DEBUG_UART_TX_CLKSRC			XBAR_SRC_HSI
#define DEBUG_UART_TX_EN_REG			RCC_USART6CFGR
#define DEBUG_UART_TX_EN			RCC_UARTxCFGR_UARTxEN
#define DEBUG_UART_RST_REG			RCC_USART6CFGR
#define DEBUG_UART_RST_BIT			RCC_UARTxCFGR_UARTxRST
#define DEBUG_UART_PREDIV_CFGR			RCC_PREDIV8CFGR
#define DEBUG_UART_FINDIV_CFGR			RCC_FINDIV8CFGR

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
/*
 * Copyright (C) 2026, STMicroelectronics - All Rights Reserved
 * Author: STM32CubeMX code generation for STMicroelectronics.
 */

/* For more information on Device Tree configuration, please refer to
 * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
 */

/dts-v1/;

#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include <dt-bindings/clock/stm32mp25-clksrc.h>
#include "stm32mp25-mx.dtsi"

#include "stm32mp257.dtsi"
#include "stm32mp25xf.dtsi"
#include "stm32mp257f-firmware-mx-rcc.dtsi"
#include "stm32mp25xxak-pinctrl.dtsi"
#include "stm32mp25-ddr.dtsi"

/* USER CODE BEGIN includes */
/* USER CODE END includes */

/ {
	model = "STMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11";
	compatible = "st,stm32mp257f-firmware-mx", "st,stm32mp257";

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x00000001 0x00000000>;

		/* USER CODE BEGIN memory */
		/* USER CODE END memory */
	};

	/* USER CODE BEGIN root */
	
	aliases{
		serial0 = &usart6;
	};

	chosen{
		stdout-path = "serial0:115200n8";
	};
	
	/* USER CODE END root */

}; /*root*/

&pinctrl {
	i2c7_pins_mx: i2c7_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('D', 14, AF10)>, /* I2C7_SDA */
					 <STM32_PINMUX('D', 15, AF10)>; /* I2C7_SCL */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	sdmmc1_pins_mx: sdmmc1_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
					 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
					 <STM32_PINMUX('E', 2, AF10)>, /* SDMMC1_CMD */
					 <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
					 <STM32_PINMUX('E', 5, AF10)>; /* SDMMC1_D1 */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
	};

	usart6_pins_mx: usart6_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('F', 13, AF3)>; /* USART6_TX */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('F', 14, AF3)>; /* USART6_RX */
			bias-pull-up;
			drive-push-pull;
		};
	};

	/* USER CODE BEGIN pinctrl */
	/* USER CODE END pinctrl */
};

&pinctrl_z {
	/* USER CODE BEGIN pinctrl_z */
	/* USER CODE END pinctrl_z */
};

&bsec {
	status = "okay";

	/* USER CODE BEGIN bsec */
	board_id: board_id@3d8 {
		reg = <0x3d8 0x4>;
	};
	/* USER CODE END bsec */
};

&ddr {
	status = "okay";

	/* USER CODE BEGIN ddr */
	vdd1-supply = <&vdd1_ddr>;
	vdd2-supply = <&vdd2_ddr>;
	vddq-supply = <&vdd2_ddr>;
	/* USER CODE END ddr */
};

&i2c7 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c7_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c7 */
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;
	#address-cells = <1>;
	#size-cells = <0>;

	pmic2: stpmic@33 {
		compatible = "st,stpmic2";
		reg = <0x33>;
		status = "okay";

		regulators {
			compatible = "st,stpmic2-regulators";

			vddcpu: buck1 {
				regulator-name = "vddcpu";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <910000>;
				regulator-always-on;
			};
			vddcore: buck2 {
				regulator-name = "vddcore";
				regulator-min-microvolt = <820000>;
				regulator-max-microvolt = <820000>;
				regulator-always-on;
			};
			vddgpu: buck3 {
				regulator-name = "vddgpu";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <900000>;
				regulator-always-on;
			};
			vddio_pmic: buck4 {
				regulator-name = "vddio_pmic";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			v1v8: buck5 {
				regulator-name = "v1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};
			vdd2_ddr: buck6 {
				regulator-name = "vdd2_ddr";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
			};
			v3v3: buck7 {
				regulator-name = "v3v3";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			vdda1v8_aon: ldo1 {
				regulator-name = "vdda1v8_aon";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};
			vdd_emmc: ldo2 {
				regulator-name = "vdd_SD_card_temporary";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			vdd1_ddr: ldo3 {
				regulator-name = "vdd1_ddr";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
			};
			vdd3v3_usb: ldo4 {
				regulator-name = "vdd3v3_usb";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			v5v_hdmi: ldo5 {
				regulator-name = "v5v_hdmi";
				regulator-min-microvolt = <2000000>;
				regulator-max-microvolt = <2000000>;
			};
			vdd_sdcard: ldo7 {
				regulator-name = "vdd_sdcard";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
			vddio_sdcard: ldo8 {
				regulator-name = "vddio_sdcard";
				st,regulator-bypass-microvolt = <3300000>;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
	/* USER CODE END i2c7 */
};

&icache {
	status = "okay";

	/* USER CODE BEGIN icache */
	/* USER CODE END icache */
};

&rcc {
	status = "okay";

	/* USER CODE BEGIN rcc */
	/* USER CODE END rcc */
};

&sdmmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc1_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc1 */
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&vdd_sdcard>;
	vqmmc-supply = <&vddio1>;
	/delete-property/cap-sd-highspeed;
	/delete-property/cap-mmc-highspeed;
	/* USER CODE END sdmmc1 */
};

&usart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&usart6_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN usart6 */
	/* USER CODE END usart6 */
};

/* USER CODE BEGIN addons */
/* USER CODE END addons */

ubuntu@Windows:~/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot$ make
>>>   Finalizing host directory
>>>   Finalizing target directory
mkdir -p /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/etc/meson
sed -e "s%@TARGET_CFLAGS@%'-D_LARGEFILE_SOURCE', '-D_LARGEFILE64_SOURCE', '-D_FILE_OFFSET_BITS=64', '-Os', '-g0', '-D_FORTIFY_SOURCE=1'@PKG_TARGET_CFLAGS@%g" -e "s%@TARGET_LDFLAGS@%@PKG_TARGET_LDFLAGS@%g" -e "s%@TARGET_CXXFLAGS@%'-D_LARGEFILE_SOURCE', '-D_LARGEFILE64_SOURCE', '-D_FILE_OFFSET_BITS=64', '-Os', '-g0', '-D_FORTIFY_SOURCE=1'@PKG_TARGET_CXXFLAGS@%g" -e "s%@TARGET_FCFLAGS@%'-Os', '-g0'@PKG_TARGET_FCFLAGS@%g"         -e "s%@TARGET_CC@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-gcc%g" -e "s%@TARGET_CXX@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-g++%g" -e "s%@TARGET_AR@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-gcc-ar%g" -e "s%@TARGET_FC@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-gfortran%g" -e "s%@TARGET_STRIP@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-strip%g" -e "s%@TARGET_ARCH@%aarch64%g" -e "s%@TARGET_CPU@%cortex-a35%g" -e "s%@TARGET_ENDIAN@%little%g" -e "s%@TARGET_FCFLAGS@%%g" -e "s%@TARGET_CFLAGS@%%g" -e "s%@TARGET_LDFLAGS@%%g" -e "s%@TARGET_CXXFLAGS@%%g" -e "s%@BR2_CMAKE@%/usr/bin/cmake%g" -e "s%@PKGCONF_HOST_BINARY@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/pkgconf%g" -e "s%@HOST_DIR@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host%g" -e "s%@STAGING_DIR@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/aarch64-buildroot-linux-gnu/sysroot%g" -e "s%@STATIC@%false%g" /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/support/misc/cross-compilation.conf.in > /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/etc/meson/cross-compilation.conf.in
sed         -e "s%@TARGET_CC@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-gcc%g" -e "s%@TARGET_CXX@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-g++%g" -e "s%@TARGET_AR@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-gcc-ar%g" -e "s%@TARGET_FC@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-gfortran%g" -e "s%@TARGET_STRIP@%/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-strip%g" -e "s%@TARGET_ARCH@%aarch64%g" -e "s%@TARGET_CPU@%cortex-a35%g" -e "s%@TARGET_ENDIAN@%little%g" -e "s%@TARGET_FCFLAGS@%'-Os', '-g0'%g" -e "s%@TARGET_CFLAGS@%'-D_LARGEFILE_SOURCE', '-D_LARGEFILE64_SOURCE', '-
if test -d /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target/lib/modules/`MAKEFLAGS='' /usr/bin/make -j9 HOSTCC="/usr/bin/gcc -O2 -I/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/include -L/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/lib -Wl,-rpath,/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/lib" ARCH=arm64 
find /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target   -type f \( -perm /111 -o -name '*.so*' \) -not \( -name 'libpthread*.so*' -o -name 'ld-*.so*' -o -name '*.ko' \) -print0 | xargs -0 /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-strip --remove-section=.comment --remove-section=.note 2>/dev/null || true
find /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target   \( -name 'ld-*.so*' -o -name 'libpthread*.so*' \) -print0 | xargs -0 -r /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/aarch64-none-linux-gnu-strip --remove-section=.comment --remove-section=.note --strip-debug 2>/dev/null || true
test -f /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target/etc/ld.so.conf && \
        { echo "ERROR: we shouldn't have a /etc/ld.so.conf file"; exit 1; } || true
test -d /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target/etc/ld.so.conf.d && \
        { echo "ERROR: we shouldn't have a /etc/ld.so.conf.d directory"; exit 1; } || true
mkdir -p /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target/etc
( \
        echo "NAME=Buildroot"; \
        echo "VERSION=2023.02-git"; \
        echo "ID=buildroot"; \
        echo "VERSION_ID=2023.02-git"; \
        echo "PRETTY_NAME=\"Buildroot 2023.02-git\"" \
) 
>>>   Generating root filesystems common tables
rm -rf /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs
mkdir -p /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs
printf '   \n' >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/full_users_table.txt
printf '        /bin/busybox                     f 4755 0  0 - - - - -\n\n' > /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/full_devices_table.txt
cat system/device_table.txt >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/full_devices_table.txt
>>>   Generating filesystem image rootfs.ext2
mkdir -p /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/images
rm -rf /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2
mkdir -p /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2
rsync -auH --exclude=/THIS_IS_NOT_YOUR_ROOT_FILESYSTEM /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/target/ /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target
echo '#!/bin/sh' > /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
echo "set -e" >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
echo "chown -h -R 0:0 /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target" >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
PATH="/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin:/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/sbin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/usr/lib/wsl/lib:/snap/bin" /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/support/scripts/mkusers /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/full_users_table.txt /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
echo "/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/makedevs -d /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/full_devices_table.txt /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target" >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
printf '        rm -rf /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target/usr/lib/udev/hwdb.d/ /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target/etc/udev/hwdb.d/\n' >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
echo "find /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target/run/ -mindepth 1 -prune -print0 | xargs -0r rm -rf --" >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
echo "find /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target/tmp/ -mindepth 1 -prune -print0 | xargs -0r rm -rf --" >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
printf '   \n' >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
printf '   \n' >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
printf '        rm -f /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/images/rootfs.ext2\n  /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/sbin/mkfs.ext4 -d /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target -r 1 -N 0 -m 5 -L "rootfs" -O ^64bit /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/images/rootfs.ext2 "100M" || { ret=$?; echo "*** Maybe you need to increase the filesystem size (BR2_TARGET_ROOTFS_EXT2_SIZE)" 1>&2; exit $ret; }\n' >> /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
chmod a+x /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
PATH="/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin:/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/sbin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games:/usr/lib/wsl/lib:/snap/bin" FAKEROOTDONTTRYCHOWN=1 /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/host/bin/fakeroot -- /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/fakeroot
rootdir=/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/ext2/target
table='/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/buildroot-fs/full_devices_table.txt'
mke2fs 1.46.5 (30-Dec-2021)
Creating regular file /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/images/rootfs.ext2
64-bit filesystem support is not enabled.  The larger fields afforded by this feature enable full-strength checksumming.  Pass -O 64bit to rectify.
Creating filesystem with 102400 1k blocks and 25584 inodes
Filesystem UUID: 5e8d4474-1771-48d1-8263-888b85f72c01
Superblock backups stored on blocks:
        8193, 24577, 40961, 57345, 73729

Allocating group tables: done
Writing inode tables: done
Creating journal (4096 blocks): done
Copying files into the device: done
Writing superblocks and filesystem accounting information: done

ln -sf rootfs.ext2 /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/images/rootfs.ext4
>>>   Executing post-image script /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot-external-st/board/stmicroelectronics/common/generate-sdcard.sh
INFO: cmd: "mkdir -p "/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/genimage.tmp"" (stderr):
INFO: cmd: "rm -rf "/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/build/genimage.tmp"/*" (stderr):
INFO: cmd: "mkdir -p "/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot/output/images"" (stderr):
INFO: hdimage(sdcard.img): adding partition 'fsbla' (in MBR) from 'tf-a-stm32mp257f-firmware-mx.stm32' ...
INFO: hdimage(sdcard.img): adding partition 'fip' (in MBR) from 'fip.bin' ...
INFO: hdimage(sdcard.img): adding partition 'u-boot-env' (in MBR) ...
INFO: hdimage(sdcard.img): adding partition 'rootfs' (in MBR) from 'rootfs.ext4' ...
INFO: hdimage(sdcard.img): adding partition '[MBR]' ...
INFO: hdimage(sdcard.img): adding partition '[GPT header]' ...
INFO: hdimage(sdcard.img): adding partition '[GPT array]' ...
INFO: hdimage(sdcard.img): adding partition '[GPT backup]' ...
INFO: hdimage(sdcard.img): writing GPT
INFO: hdimage(sdcard.img): writing protective MBR
INFO: hdimage(sdcard.img): writing MBR
>>>   Executing post-image script /home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot-external-st/board/stmicroelectronics/common/generate-flashlayout.sh
cp: -r not specified; omitting directory '/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot-external-st/board/stmicroelectronics/common/usb_flash_binaries/'
cp: -r not specified; omitting directory '/home/ubuntu/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot-external-st/board/stmicroelectronics/common/usb_flash_binaries/'
ubuntu@Windows:~/github/Watermelon-Wine-1A/watermelon-wine-os/buildroot$

[DMårt]

@PatrickF @Kevin HUBER 

Here is the correct settings for USART6 for early console. I was misstaken for DEBUG_UART_TX_GPIO_ALTERNATE should have the number 8, i.e AF8, but according to the datasheet, it must have number 3, i.e AF3.

/* USART6 on HSI@64MHz, TX on PF13 Alternate 3 */
#define STM32MP_DEBUG_USART_BASE                USART6_BASE
#define DEBUG_UART_TX_GPIO_BANK_ADDRESS         GPIOF_BASE
#define DEBUG_UART_TX_GPIO_BANK_CLK_REG         RCC_GPIOFCFGR
#define DEBUG_UART_TX_GPIO_BANK_CLK_EN          RCC_GPIOxCFGR_GPIOxEN
#define DEBUG_UART_TX_GPIO_PORT                 13
#define DEBUG_UART_TX_GPIO_ALTERNATE            3
#define DEBUG_UART_TX_CLKSRC_REG                RCC_XBAR8CFGR
#define DEBUG_UART_TX_CLKSRC                    XBAR_SRC_HSI
#define DEBUG_UART_TX_EN_REG                    RCC_USART6CFGR
#define DEBUG_UART_TX_EN                        RCC_UARTxCFGR_UARTxEN
#define DEBUG_UART_RST_REG                      RCC_USART6CFGR
#define DEBUG_UART_RST_BIT                      RCC_UARTxCFGR_UARTxRST
#define DEBUG_UART_PREDIV_CFGR                  RCC_PREDIV8CFGR
#define DEBUG_UART_FINDIV_CFGR                  RCC_FINDIV8CFGR

. Here is the output result:

NOTICE:  Early console setup
ERROR:   failed to enable clock id: 5
BACKTRACE: START: clk_stm32_enable_call_ops
0: EL3: 0xe017bac
1: EL3: 0xe01be2c
2: EL3: 0xe01beb0
3: EL3: 0xe01bf54
4: EL3: 0xe01c240
5: EL3: 0xe01db28
6: EL3: 0xe029a2c
7: EL3: 0xe0170dc
BACKTRACE: END: clk_stm32_enable_call_ops
PANIC at PC : 0x000000000e01be34