2025-10-29 9:27 PM
Hello,
I have developed a custom board using the STM32MP157DAA1. When I try to write the boot image, the process stops after writing fsbl-boot and does not proceed to the next step.
I checked the output from the debug port and received the following log:
NOTICE: CPU: STM32MP157DAA Rev.Z NOTICE: Model: STMicroelectronics custom STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11 INFO: PMIC version = 0x21 INFO: Reset reason (0x15): INFO: Power-on Reset (rst_por) INFO: FCONF: Reading TB_FW firmware configuration f file from: 0x2ffe2000 INFO: FCONF: Reading firmware configuration informa tion for: stm32mp_fuse INFO: FCONF: Reading firmware configuration informa tion for: stm32mp_io INFO: Using USB INFO: Instance 2 INFO: Boot used partition fsbl1 NOTICE: BL2: v2.10-stm32mp1-r2.0(debug):() NOTICE: BL2: Built : 11:48:32, Oct 29 2025 INFO: BL2: Doing platform setup INFO: RAM: DDR3-DDR3L 16bits 533000kHz ERROR: DDR addr bus test: can't access memorPANIC at PC : 0x2ffed13d Exception mode=0x00000016 at: 0x2ffed13d
As shown in the log, a PANIC occurs immediately after the ERROR: DDR addr bus test: can't access memor.
I am currently reviewing the TF-A device tree configuration, but I haven't been able to identify the cause. Does this error indicate that the DDR memory is not working correctly?
I am using the same DDR memory part number as the evaluation board: MT41K256M16TW-107_IT_P_TR.
Could you please provide any advice on what I should check or what the potential cause might be?
Thank you.
Solved! Go to Solution.
2025-11-05 9:19 PM
Hello sabry,
Thank you for your message.
I managed to resolve the issue on my end. The problem was an error where the PMIC's PWRCTRL signal was not being set HIGH. After correcting this hardware issue, I used the STM32DDRFW-UTIL tool to tune the DDR, and it is now working successfully.
I apologize for the confusion, as my problem was ultimately not related to the Device Tree configuration I originally suspected. Thank you for reaching out.
Regards
2025-10-31 5:54 AM
Hello mittyan321,
I’m currently working on a custom board based on the MYC-YA15XC-T (STM32MP151A) module, and I’m facing a similar situation during bring-up.
I saw that in your case, you had the DDR initialization issue (ERROR: DDR addr bus test: can't access memory) and mentioned you were checking the TF-A Device Tree configuration.
Could you please share how you configured the Device Tree (TF-A and U-Boot parts) for your custom board?
Specifically:
Did you start from the CubeMX generated .dts or from the EV1 / DK2 reference?
Which files did you modify to match your DDR configuration (e.g. stm32mp15-ddr.dtsi, tf-a device-tree)?
Did you have to adjust any parameters under the &rcc or &ddr nodes to make it work?
It would be really helpful to see an example of your setup, since I’m trying to validate my own device tree for a board using a similar memory part and PMIC (STPMIC1).
Thank you in advance for your feedback
sabry
2025-11-05 9:19 PM
Hello sabry,
Thank you for your message.
I managed to resolve the issue on my end. The problem was an error where the PMIC's PWRCTRL signal was not being set HIGH. After correcting this hardware issue, I used the STM32DDRFW-UTIL tool to tune the DDR, and it is now working successfully.
I apologize for the confusion, as my problem was ultimately not related to the Device Tree configuration I originally suspected. Thank you for reaching out.
Regards