STM32MP135F: Unable to boot from SPI-NAND (GD5F4GM8UExxG)

[GaneshKPhytec]

Hello ST team,

I’m working on a custom board based on STM32MP135F SoC, with GigaDevice GD5F4GM8UExxG (512 MiB SPI-NAND) connected on SPI1 interface.

I’ve successfully integrated this NAND flash in U-Boot and Linux (Yocto build), but the board fails to boot directly from SPI-NAND. Please find the attached text file which is having the all changes.
When booting from SD card, I can probe, erase, and write to the SPI-NAND successfully — data can be read back and verified. please check below logs:
stm32mp13x:~# dmesg | grep spi
[ 0.708654] spi-nand spi0.0: GigaDevice SPI NAND was found.
[ 0.708678] spi-nand spi0.0: 512 MiB, block size: 128 KiB, page size: 2048, OOB size: 128
[ 0.708944] 9 fixed-partitions partitions found on MTD device spi-nand0
[ 0.708962] Creating 9 MTD partitions on "spi-nand0":

I can able to flash the image to spi-nand flash successfully after configuring in the uboot and tfa.
However, when I configure boot from QSPI-NAND, the boot ROM and TF-A logs indicate all blocks are bad. below is the log while booting from spi-nand

Exception mode=0x00000016 at: 0x2fff764c
NOTICE: CPU: STM32MP135D Rev.Y
NOTICE: Model: STMicroelectronics STM32MP135F-DK Discovery Board
INFO: Reset reason (0x34):
INFO: Pad Reset from NRST
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe0000
INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: Using SPI NAND
INFO: Instance 1
INFO: Boot used partition fsbl1
NOTICE: BL2: v2.10-stm32mp1-r2.0(debug):MYD-YF13X_2.10_V2.0.0_RC_20250926(e6a6fd49)
NOTICE: BL2: Built : 06:09:33, Aug 11 2025
WARNING: Block 8 is bad
WARNING: Block 9 is bad
WARNING: Block 10 is bad
WARNING: Block 11 is bad
WARNING: Block 12 is bad
WARNING: Block 13 is bad
WARNING: Block 14 is bad
.....
WARNING: Block 2044 is bad
WARNING: Block 2045 is bad
WARNING: Block 2046 is bad
WARNING: Block 2047 is bad
ERROR: mtd_add_extra_offset: Seek error -5
WARNING: Failed to load image id id=12 (-5)
WARNING: loading of FWU-Metadata failed, using Bkup-FWU-Metadata
ASSERT: drivers/io/io_mtd.c:140

Exception mode=0x00000016 at: 0x2fff764c

Hardware setup

• SoC: STM32MP135F

• Flash: GigaDevice GD5F4GM8UExxG (512 MiB, 2048 B page, 128 KiB block)

• Interface: SPI1 @ 66 MHz (tried also 20 MHz, 104 MHz)

• Boot source: SPI-NAND

• kernel : 6.6
• uboot: v2023.10

Yocto UBI configuration (256 MiB → 512 MiB updated)

# for 512 MiB GD5F4GM8UExxG
MKUBIFS_ARGS_nand_2_128_512 = "--min-io-size 2048 --leb-size 126976 --max-leb-cnt 4096"
UBINIZE_ARGS_nand_2_128_512 = "--min-io-size 2048 --peb-size 128KiB"
EXTRA_UBIFS_SIZE_nand_2_128_512 = "2816"

Could you please advise on:

1. Whether GD5F4GM8UExxG is officially supported by STM32MP135 boot ROM / TF-A SPI-NAND driver?

2. If the bad block scan mechanism or ECC layout needs adaptation for this device?

3. Whether TF-A expects any specific page / block geometry alignment for the bootloader region (fsbl1, fip-a1, etc.)?

Logs and configurations can be provided in full if needed.

Thanks,
Ganesh K

---

[PatrickF]

Hi,

Did you setup correct parameters in OTP (mandatory for serial NAND) ?

https://wiki.st.com/stm32mpu/wiki/STM32_MPU_ROM_code_overview#nand_param_stored_in_otp

Regards.

[GaneshKPhytec]

Hi PatrickF,

Thanks for your quick response.

Yes, the original STM32MP135 evaluation board comes with the default 256 MB SPI-NAND (Micron MT29F2G01ABA), and the board was booting successfully from it.

For my evaluation, I have replaced this device with a 512 MB GigaDevice SPI-NAND (GD5F4GM8UExxG) on the same SPI interface, keeping the same hardware connections and pin configuration.

Since the board was already booting from SPI-NAND in its default configuration, I assumed the OTP parameters were already programmed for SPI-NAND boot.

Could you please confirm whether I still need to update the OTP with NAND parameters again when changing to a different SPI-NAND device (even if the interface and basic geometry — 2 KiB page, 128 KiB block — remain the same)?

If yes, could you please clarify:

• Which exact OTP words must be updated for SPI-NAND boot configuration?

• Whether the parameters (like manufacturer ID, page/block size) must match the new flash’s ID?

• And if TF-A or U-Boot can override these OTP settings during initialization?

Thanks & Regards,
Ganesh K

[PatrickF]

Hi,

you cannot update OTP one programmed (OTP stand for One Time Programming).

You might try to dump existing OTP on the IC to figure out if this is suitable for your memory according to wiki information. The Micron might have specific plane selection.

As you put a log from TF-A (starting with "NOTICE: xxxxx")  , I think the BOOTROM was able to load Serial-NAND FSBL. So it might be something else who fail inside TF-A (check differences Vs Micron).

Regards.

[GaneshKPhytec]

Hi PatrickF,

Thanks for the clarification.

Yes, the BootROM is able to load the FSBL from the 512 MB GigaDevice SPI-NAND — TF-A logs confirm that part works.

Understood that OTP can’t be reprogrammed. I’ll dump the current NAND- related OTP values and compare them with the wiki to check if the Micron-specific configuration (plane or ID) is causing TF-A to fail with the new GigaDevice part.
Please find below log for the same: please do let me know is it correct command to read the OTP.

STM32MP> fuse read 0 0 96
Reading bank 0:

Word 0x00000000: 00000017 00008801 d0100010 00000000
Word 0x00000004: 00000000 00000000 00000000 00000000
Word 0x00000008: 00000010 00000000 00000000 00000000
Word 0x0000000c: 7d1780f7 0006002c 32325114 38383736
Word 0x00000010: 03d78100 9891275b 7a7801e0 06111375
Word 0x00000014: 05da0048 448e7a28 00000000 03f402fd
Word 0x00000018: ffffffff ffffffff ffffffff ffffffff
Word 0x0000001c: ffffffff ffffffff ffffffff ffffffff
Word 0x00000020: 00000000 00000000 00000000 00000000
Word 0x00000024: 00000000 00000000 00000000 00000000
Word 0x00000028: 00000000 00000000 00000000 00000000
Word 0x0000002c: 00000000 00000000 00000000 00000000
Word 0x00000030: 00000000 00000000 00000000 00000000
Word 0x00000034: 00000000 00000000 00000000 00000000
Word 0x00000038: 00000000 00000000 00000000 00000000
Word 0x0000003c: 00000000 00000000 00000000 00000000
Word 0x00000040: 00000000 00000000 00000000 00000000
Word 0x00000044: 00000000 00000000 00000000 00000000
Word 0x00000048: 00000000 00000000 00000000 00000000
Word 0x0000004c: 00000000 00000000 00000000 00000000
Word 0x00000050: 00000000 00000000 00000000 00000000
Word 0x00000054: 00000000 00000000 00000000 00000000
Word 0x00000058: 00000000 00000000 00000000 00000000
Word 0x0000005c: 00000000 00000000 00000000 00000000
STM32MP>

Thanks & Regards

Ganesh.K

[PatrickF]

That's sound OK, seems the fuse #10 (decimal) contain 0x00000000.

Is that value read from a device booting from Micron NAND or a blank device ? Micron you mention seems to need plane select.

But issue is probably elsewhere as BOOTROM is able to load the FSBL, so I assume OTP should be fine.

Maybe TF-A is not well setup for the memory bad block indication inside spare area (micron has 128 bytes spare array wheras Gigadevice has 64 bytes when ECC is enabled). I don't know if this is root cause and if easy to change inside code (I fear it is not DT).

Sorry, I cannot help much more.

Regards.

[GaneshKPhytec]

Hi Patrickf,

Sorry I forgot to mention, previous fuse read is from gigadevice nand flash board. running on the usb serial flash then stopped at uboot then given fuse read command. there its showing 0x000000 . not sure how it takes the fuse. to compare i have other micron nand flash board and read the fuse. please check below fuse read from micron(256MB) spi-nand flash.

STM32MP> fuse read 0 0 96
Reading bank 0:

Word 0x00000000: 00000017 00008801 d0100010 00000000
Word 0x00000004: 00000000 00000000 00000000 00000000
Word 0x00000008: 00000010 00000000 00000000 00000000
Word 0x0000000c: 7d1e89f7 000d001f 34325116 35373334
Word 0x00000010: 04557180 98833072 7aa401e0 061312ed
Word 0x00000014: 05d6003c 669ebb2d 00000000 03f70300
Word 0x00000018: ffffffff ffffffff ffffffff ffffffff
Word 0x0000001c: ffffffff ffffffff ffffffff ffffffff
Word 0x00000020: 00000000 00000000 00000000 00000000
Word 0x00000024: 00000000 00000000 00000000 00000000
Word 0x00000028: 00000000 00000000 00000000 00000000
Word 0x0000002c: 00000000 00000000 00000000 00000000
Word 0x00000030: 00000000 00000000 00000000 00000000
Word 0x00000034: 00000000 00000000 00000000 00000000
Word 0x00000038: 00000000 00000000 00000000 00000000
Word 0x0000003c: 00000000 00000000 00000000 00000000
Word 0x00000040: 00000000 00000000 00000000 00000000
Word 0x00000044: 00000000 00000000 00000000 00000000
Word 0x00000048: 00000000 00000000 00000000 00000000
Word 0x0000004c: 00000000 00000000 00000000 00000000
Word 0x00000050: 00000000 00000000 00000000 00000000
Word 0x00000054: 00000000 00000000 00000000 00000000
Word 0x00000058: 00000000 00000000 00000000 00000000
Word 0x0000005c: 00000000 00000000 00000000 00000000
STM32MP>

Here its showing the values, but this values are coming same even after booting from nand or usb serial.

Thanks & Regards

Ganesh.K

[GaneshKPhytec]

Hi...

I have read the configuration of B0h register of spinand in tfa. ECC is disabled, please check the log from below:
NOTICE: CPU: STM32MP135D Rev.Y
NOTICE: Model: STMicroelectronics STM32MP135F-DK Discovery Board
INFO: Reset reason (0x35):
INFO: Power-on Reset (rst_por)
INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffe0000
INFO: FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO: FCONF: Reading firmware configuration information for: stm32mp_io
INFO: Using SPI NAND
INFO: Instance 1
INFO: Boot used partition fsbl1
INFO: spi_nand_init1...
INFO: spi_nand_init2...
INFO: spi_nand_init3...
INFO: plat_get_spi_nand_data...1
INFO: SPI NAND geometry:
INFO: Page size = 2048 bytes
INFO: Block size = 131072 bytes
INFO: Planes = 2
INFO: Total size = 536870912 bytes
INFO: spi_nand_wait_ready Status 0
INFO: spi_nand_read_id...
INFO: SPI_NAND Detected ID 0xc8
INFO: Page size 2048, Block size 131072, size 536870912
INFO: SPI_NAND Detected ID [Manuf=0xc8, Dev=0x95]
NOTICE: BL2: v2.10-stm32mp1-r2.0(debug):MYD-YF13X_2.10_V2.0.0_RC_20250926-dirty(e6a6fd49)
NOTICE: BL2: Built : 06:09:33, Aug 11 2025
NOTICE: bl2_main..1
NOTICE: bl2_main...2
NOTICE: inside plat_fwu_is_enabled
INFO: spi_nand_update_cfg function...
INFO: SPI_NAND: Updating config reg (0xB0): old=0x10 new=0x00 QE=DISABLED
INFO: SPI_NAND: Updating config reg (0xB0): old=0x10 new=0x00 ECC=DISABLED
INFO: spi_nand_wait_ready Status 1
INFO: spi_nand_wait_ready Status 0
INFO: SPI_NAND: Checking bad block 8 | page_size=2048 | pages_per_block=64
WARNING: Block 8 is bad
......

Still facing the same issue.  Anywhere else i need to check to resolve this issue?

Thanks & Regards

Ganesh.K

[GaneshKPhytec · Accepted solution]

Hi PatrickF,

The issue has been resolved after enabling the QE bit and bus width configuration to SPI_MEM_BUSWIDTH_4_LINE. The board now boots successfully without any errors.

Log confirmation:

INFO: SPI_NAND - SPI_NAND_HAS_QE_BIT
INFO: SPI_NAND - SPI_MEM_BUSWIDTH_4_LINE QUAD enabled
INFO: SPI_NAND: Updating config reg (0xB0): old=0x10 new=0x11 QE=ENABLED
INFO: SPI_NAND: Updating config reg (0xB0): old=0x10 new=0x11 ECC=ENABLED

Thank you very much for your support.

Thanks & Regards
Ganesh.K