Ask questions and find answers on STM32 microprocessors, including hardware, power, DRAM, flashing, interfacing, device tree, and peripherals.
Hello everyone.I am modifying the distribution packages of 157C-DK2 and 157C-EV1 for my project.When I previously configured my rootfs using buildroot and debian-jessie, I proceeded as follows(other boards).Packages that can be configured using bui...
Hi,I'm using your wikihttps://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-DK2/Develop_on_Arm%C2%AE_Cortex%C2%AE-A7/Modify,_rebuild_and_reload_the_Linux%C2%AE_kernelto add some device threes that belongs to a different board ...
APT-Get returns cannot find packages for everything. add-apt repository in not found.Any help would be appreciated.
Dear all, I am looking to use the STPMIC1 in one new STM32MP15x design which will spend most of this time in standby mode. I am looking for STPMIC1 buck efficiency at light load (~1mA). In the datasheet there is numbers only for 150mA, 750mA and 1A. ...
Hello,has anyone successful booted linux v5.4-stm32mp-r1 on the stm32mp157c-dk2 board?If so can you please provide me a working config?I am trying to switch from the 4.19 kernel to v5.4-stm32mp-r1 but the boards freezes after trying to load the kern...
Hello everyone,I'm using an STM32MP157-DK1 and i'm really interested in doing bare-metal/RTOS usage of this new microprocessor. Unfortunately at the moment the documentation is more focused on how to deploy Linux and use the A7 cores with Linux.My gu...
Which IDEs can be used for free in order to download/debug my application in an asynchronous fashion as two cores are running the the same time. I have taken a look on some suppliers (Tools & Software), but it looks like that you need to pay a some m...
Dear All,According to AN5256 "discrete power supply hardware integration" the power source for VDD is turned off in case of crash to "reset" the hardware using the PWR_ONRST signal. At startup. At cold startup and immediately after a crash the power ...
Hi There,I have a question regarding with DDR3L fly-by topology suggested to use by the design guide.My understanding is that STM32MP1 does not support the write/read leveling feature suggested in the JESD standard.If my above understanding is correc...
