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STM32MP157 Device Tree for Fixed Phy RGMII using RCC125 Clk

Bkell.1
Associate II

Hi

We have a Custom Board based from MB1272 dev kit.

Our system needs to connect the RGMII to a Marvell Switch Chip where that Switch is Managed MDIO from a different MPU.

As such we need our STM32MP157 MPU to run in a fixed phy mode and use the RCC to be its 125Mhz clk.

Please see simplified drawing

Bkell1_0-1764686078235.png

I have looked at the https://wiki.st.com/stm32mpu/wiki/Ethernet_device_tree_configuration#RGMII_with_Crystal_on_PHY-2C_no_125Mhz_from_PHY

but still confused as to how to do this

We have tried a few DT settings but  no success, 

would really appreciate some help on this one

Thanks 

 

3 REPLIES 3
PatrickF
ST Employee

Hi,

trying to help, maybe share more details of what's going wrong. 
Any dmesg on the console to share ?

You should also define the 125MHz clock path in the DT.
https://wiki.st.com/stm32mpu/wiki/Clock_overview 

Regards,

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Bkell.1
Associate II

Hi PatrickF

I have asked our dev team to try - check a couple more things

And will reply soon with Logs and DTs

Regards

Brett

Hi PatrickF

 

Below 

1. clk_summary attached.
2. dmesg:
[  169.674938] stm32f7-i2c 40015000.i2c: Trying to recover bus
 grep mac
[    3.478063] stm32-dwmac 5800a000.ethernet: IRQ eth_lpi not found
[    3.483170] stm32-dwmac 5800a000.ethernet: no reset control found
[    3.489619] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42
[    3.495788] stm32-dwmac 5800a000.ethernet:   DWMAC4/5
[    3.500782] stm32-dwmac 5800a000.ethernet: DMA HW capability register supported
[    3.508069] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine supported
[    3.515380] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported
[    3.522294] stm32-dwmac 5800a000.ethernet: Wake-Up On Lan supported
[    3.528613] stm32-dwmac 5800a000.ethernet: TSO supported
[    3.533818] stm32-dwmac 5800a000.ethernet: Enable RX Mitigation via HW Watchdog Timer
[    3.541755] stm32-dwmac 5800a000.ethernet: device MAC address fa:5c:95:0f:a0:f5
[    3.548946] stm32-dwmac 5800a000.ethernet: Enabled Flow TC (entries=2)
[    3.555553] stm32-dwmac 5800a000.ethernet: TSO feature enabled
[    3.561346] stm32-dwmac 5800a000.ethernet: Using 32 bits DMA width
[   14.580959] stm32-dwmac 5800a000.ethernet: Failed to reset the dma
[   14.585759] stm32-dwmac 5800a000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
[   14.594789] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Hw setup failed
 
3. dts attached
4. patches I've added on top of linux + u-boot also attached