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SPSGRF-915 Low Power RF Modules : Enabling LDCR Mode

Sahilsb7
Associate III

Hello,

I would like to gather some information related to enabling LDRC mode on SPSGRF-915 Low Power RF Modules.

Below are the documents I am referring to:

1.) SPIRIT1 Data Sheet : Section 7.3 Low Duty Cycle Reload Mode.
2.) AN4193 Application Notes : Entire document as it focuses on LDCR mode and RX TIMEOUT along with Programming Tips to enable the same.

I am currently working with two SPSGRF-915 modules. One is a RF transmitter only and the other is a RF receiver only. The receiver module never talk back to the transmitter. Also, the RF Receiver module is a battery operated and I want to implement the LDCR mode on the receiver.

The current software version on my RF communication is a continuous RX Listening on the receiver end. Following the steps mentioned in the SPIRIT1 Data Sheet, I have implemented the below:

1.) Upon powering up the receiver module, I keep the RX_TIMEOUT to an INFIINTE Value at the beginning. 
2.)  After receiving the very first frame and processing it, as per the data sheet I make RX_TIMEOUT a FINITE value. 
This part works completely fine for me.

Since the documentation mentions that once LDCR mode is enabled, the module automatically switches between Trx and Tsleep window based on the values provided to the respective registers.  In my project, the very first frame the receiver receives is not a fixed frame. It could be any frame that would request the receiver to execute a certain operation. Some operation on the receiver end may take more than a couple of seconds to execute while some would be instant.

I am following the STEPS to program LDCR mode listed under PROGRAMMING TIPS in the AN4193 Application Notes. But LDCR mode fails in my case.
Also I make sure that in my software once I enable LDCR mode, I SET a global flag and this acts as a GUARD in the FSM implementation, preventing the software from re-enabling the reception on the radio in any situation.
  
Since the receiver operates on the basis of a Finite State Machine, I enable the LDCR mode at the end of the FSM after the receiver has received the frame. The issue I face is, since I mentioned, the very first frame the receiver could receiver may take a couple of seconds to execute, I am unable to find a sweet time to enable LDCR mode as it always overlaps with an on-going operation on the receiver or if LDCR somehow enables, the receiver gets stuck in the RX STATE and it never goes to READY STATE.

I have some questions related to the same:

1.) To enable LDCR mode, should I take into consideration the current state of the radio? If so, do I need to enable LDCR mode only when the radio is in a particular state? Such as READY?

2.) Since the radio does not provide any hardware to monitor registers and verify the LDCR mode has been successfully SET and is operational, could anyone please recommend a way to verify if the LDCR mode is successfully implemented and is operational?

3.) Are there any examples that show the right implementation of LDCR mode?


I am ready to discuss further on this if anyone is willing to assist. 

Best,
SB

@STOne-32  @Tesla DeLorean 

1 REPLY 1
Sahilsb7
Associate III

@Tesla DeLorean 
Hello,
Since you have helped with some of my previous posts. Do you happen to have any advice for this query of mine? Thank You!