Issues with running linuxptp (pt4l) on stm32mp157f-dk2

DevESG · ‎2025-12-15

Hello,

I successfully used linuxptp with stm32mp257f-dk board, but now need to do the same with stm32mp157f-dk2. linuxptp was built from the same latest sources for both boards using corresponding SDK for each board. But when ptp4l is running on stm32mp157f-dk2, debug output shows that required clock adjustments are not being applied to raw ptp clock: I tried to rebuild uImage and modules for stm32mp157f-dk2 using latest sources from v.25.08.27, but result was still the same. PTP clock is registered and is using hw timestamping according to ethtool:Time stamping parameters for end0:
Capabilities:
hardware-transmit
software-transmit
hardware-receive
software-receive
software-system-clock
hardware-raw-clock
PTP Hardware Clock: 0
Hardware Transmit Timestamp Modes:
off
on
Hardware Receive Filter Modes:
none
all
ptpv1-l4-event
ptpv1-l4-sync
ptpv1-l4-delay-req
ptpv2-l4-event
ptpv2-l4-sync
ptpv2-l4-delay-req
ptpv2-event
ptpv2-sync
ptpv2-delay-req

I'm using L2 twostep synchronization mode.

Additional linuxptp debug output I added shows that clock_adjtime never reaches stmmac driver and ptp clock is never gets adjusted.

Here is example with extended output from ptp4l:
ptp4l[153.563]: sync ingress: 1736360724116173470, orig: 1765831101826087734

ptp4l[155.563]: sync ingress: 1736360726115988190, orig: 1765831103825887101

ptp4l[155.563]: master offset -29470377709904190 s0 freq -0 path delay 5279
ptp4l[157.563]: sync ingress: 1736360728115915490, orig: 1765831105825799044

ptp4l[157.563]: Doing clock offs by -7678.779124
ptp4l[157.563]: Doing step adj by 29470377709888833 on clock -37

ptp4l[157.563]: Stepping clock -37 by 29470377709888833
ptp4l[157.564]: master offset -29470377709888833 s1 freq +7679 path delay 5279
ptp4l[159.563]: sync ingress: 1736360730115736870, orig: 1765831107825605066

ptp4l[159.563]: clockcheck: clock frequency changed unexpectedly!
ptp4l[159.563]: port 1 (end0): UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED
ptp4l[161.562]: sync ingress: 1736360732115645150, orig: 1765831109825498050

ptp4l[161.563]: clockcheck: clock frequency changed unexpectedly!

Help with resolving this issue would be greatly appreciated.

DP1042 · ‎2025-12-15

Hello，I used linuxptp with stm32mp157 but meet this error: "receive SYNC without timestamping",Is it possible that the PHY chip on my board does not support the 1588 protocol？The PHY chip on my board is rtl8211f，What is the PHY chip on your board。(I used ethtool commad to find it support HardwareTimestamp)

DevESG · ‎2025-12-16

Hi DP1042,
dmesg on my boards (157f-dk2 and 257f-dk2) shows that they both have the same chip, the one you had:
root@stm32mp2-e3-cd-7d:~# dmesg | grep PHY
[ 11.838480] stm32-dwmac 482c0000.eth1 end0: PHY [stmmac-0:01] driver [RTL8211F Gigabit Ethernet] (irq=POLL)
root@stm32mp1-e5-58-59:~# dmesg | grep PHY
[ 21.084795] stm32-dwmac 5800a000.ethernet end0: PHY [stmmac-0:00] driver [RTL8211F Gigabit Ethernet] (irq=POLL)
ethtool also shows that ehternet is capable of hw timestamping and output is identical for both boards:
root@stm32mp1-e5-58-59:~# ethtool -T end0
Time stamping parameters for end0:
Capabilities:
hardware-transmit
software-transmit
hardware-receive
software-receive
software-system-clock
hardware-raw-clock
PTP Hardware Clock: 0
Hardware Transmit Timestamp Modes:
off
on
Hardware Receive Filter Modes:
none
all
ptpv1-l4-event
ptpv1-l4-sync
ptpv1-l4-delay-req
ptpv2-l4-event
ptpv2-l4-sync
ptpv2-l4-delay-req
ptpv2-event
ptpv2-sync
ptpv2-delay-req
But for some reason on 157f call from ptp4l to adjust PTP hardware clock doesn't have any effect on it.