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STM32N6570-DK framebuffer contents not shown by LTDC

Jack3
Senior III

‎2025-10-21 11:14 AM - edited ‎2025-10-24 12:33 PM

 

Hello,

I'm experimenting with the STM32N6570-DK, using the STM32N657X0H3Q MCU.

The problem is that the framebuffer contents aren't being displayed by the LTDC.

Not when the framebuffer is alocated into internal SRAM, and not when it's in external RAM.

First I tried it in the Appl, but now I'm trying it in the FSBL.

I've performed a RIF configuration to enable access to the LTDC, but that doesn't help.

static void SystemIsolation_Config(void)
{
  __HAL_RCC_RIFSC_CLK_ENABLE();

  RIMC_MasterConfig_t RIMC_master = {0};
  RIMC_master.MasterCID = RIF_CID_1;
  RIMC_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;
  uint32_t SecPriv = GPIO_PIN_SEC | GPIO_PIN_NPRIV;

  /*RIMC configuration*/
  HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_LTDC1, &RIMC_master);
  HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_LTDC2, &RIMC_master);

  /*RISUP configuration*/
  HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_LTDC, RIMC_master.SecPriv);
  HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_LTDCL1, RIMC_master.SecPriv);
  HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_LTDCL2, RIMC_master.SecPriv);

  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_1, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_7, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_8, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOA, GPIO_PIN_15, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_6, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_7, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_12, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_13, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_14, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOB, GPIO_PIN_15, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_1, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_5, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_10, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_12, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOC, GPIO_PIN_13, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOD, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOD, GPIO_PIN_8, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOD, GPIO_PIN_9, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOD, GPIO_PIN_14, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOD, GPIO_PIN_15, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_5, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_6, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_7, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_8, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOE, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_1, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_6, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_7, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_8, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_10, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_12, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_13, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOG, GPIO_PIN_15, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOH, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOH, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOH, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOH, GPIO_PIN_6, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOH, GPIO_PIN_9, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_1, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_5, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_6, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_8, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_9, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_10, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPION, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOO, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOO, GPIO_PIN_1, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOO, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOO, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOO, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_0, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_1, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_2, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_4, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_5, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_6, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_7, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_8, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_9, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_10, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_11, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_12, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_13, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_14, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOP, GPIO_PIN_15, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOQ, GPIO_PIN_3, SecPriv);
  HAL_GPIO_ConfigPinAttributes(GPIOQ, GPIO_PIN_6, SecPriv);
}

It could be the MPU configuration, I will try to check that out further:

static void MPU_Config(void)
{
  /*
   * XSPI2 0x70000000 128MB FLASH (1-Gbit   Octo-SPI)
   * XSPI1 0x90000000  32MB PSRAM (256-Mbit Hexadeca-SPI)
   */
  MPU_Region_InitTypeDef MPU_InitStruct = {0};
  MPU_Attributes_InitTypeDef attr_config = {0};
  uint32_t primask_bit = __get_PRIMASK();
  __disable_irq();

  /* disable the MPU */
  HAL_MPU_Disable();

  /* create an attribute configuration for the MPU */
  attr_config.Attributes = INNER_OUTER(MPU_WRITE_BACK | MPU_NON_TRANSIENT | MPU_RW_ALLOCATE);
  attr_config.Number = MPU_ATTRIBUTES_NUMBER0;

  HAL_MPU_ConfigMemoryAttributes(&attr_config);

  /* Create a region associated with memory address 0x34000000 */
  /*Normal memory type, code execution allowed */
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.BaseAddress = 0x34000000; /* RAM 1756*kB */
  MPU_InitStruct.LimitAddress = 0x34000000 + 0x001B7000-1;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
  MPU_InitStruct.AccessPermission = MPU_REGION_ALL_RW;
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
  MPU_InitStruct.AttributesIndex = MPU_ATTRIBUTES_NUMBER0;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);

  /* Create a region associated with memory address 0x70000000 */
  /*Normal memory type, code execution allowed */
  MPU_InitStruct.Number = MPU_REGION_NUMBER1;
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.BaseAddress = XSPI2_BASE; /* FLASH 128MB 0x70000000 */
  MPU_InitStruct.LimitAddress = XSPI2_BASE + 0x08000000-1;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
  MPU_InitStruct.AccessPermission = MPU_REGION_ALL_RO;
  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
  MPU_InitStruct.AttributesIndex = MPU_ATTRIBUTES_NUMBER0;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);

  /* Ensure the FSBL enables MPU access for the PSRAM region before mapping it: */
  MPU_InitStruct.Number = MPU_REGION_NUMBER2;
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.BaseAddress = XSPI1_BASE; /* PSRAM 32MB 0x90000000 */
  MPU_InitStruct.LimitAddress = XSPI1_BASE + 0x02000000-1;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
  MPU_InitStruct.AccessPermission = MPU_REGION_ALL_RW;
  MPU_InitStruct.IsShareable = MPU_ACCESS_INNER_SHAREABLE | MPU_ACCESS_OUTER_SHAREABLE;
  MPU_InitStruct.AttributesIndex = MPU_ATTRIBUTES_NUMBER0;
  HAL_MPU_ConfigRegion(&MPU_InitStruct);

  /* enable the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);

  /* Exit critical section to lock the system and avoid any issue around MPU mechanisme */
  __set_PRIMASK(primask_bit);
}

Of course, the backlight is on.

What could be wrong?
It could be something with the GPIO EN or ON signals for the display, but testing with that didn't help too.

I've posted the project on GitHub:

https://github.com/AngryCarrot61/STM32N6570-DK_005

Any help is greatly appreciated.

Thanks again!

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mathiasmarkussen
ST Employee

‎2025-11-05 6:02 AM

We have a Board Setup for the STM32N6570-DK in TouchGFX Designer, have you looked at that?

If you want to use TouchGFX, I don't see any reason not to use that.

Even if you do not want to use TouchGFX, it is a good example of how to set everything up for the board in a graphical application.

 

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