X-CUBE-AZURE-H7 hw cryptographic acceleration

[JDosp.1]

Hi Team,

Is there roadmap for implementation hardware cryptography acceleration for NetX Secure using CRYP peripheral at STM32H7?

I am using STM32H735@520MHz and I am not able achieve more than 800kBit/sec for HTTPs connection (TLS 1.2 TLS_RSA_WITH_AES_128_GCM_SHA256). With HTTP only I ave no issue to achieve to 80Mbit/sec. I use 100Mbit PHY (DP83826). From this reason I think that bottleneck is a software cryptography at NetX secure.

I am try to implement AES GCM support into _nx_crypto_method_aes_gcm_operation() inside nx_crypto_aes.c but without success yet.

Thanks for answer or any hint.

Regards,

Jan

[Bubbles]

Hi @JDosp.1,

I believe your deduction is correct, but I don't know about any planned update.

What seems to the the problem? Is the encryption result incorrect or is there a crash?

BR,

J

[JDosp.1]

Hi Bubbles,

That is sad that there are no plans for hardware acceptilation for NetX secure for STM32 like have Renesas for RA family. I think this is missed opportunity.

Software implementation of cryptography from NetX secure works but performance is not optimal. Cryptography using CRYP peripheral is at least 10x faster. From this reason make sense to use CRYP peripheral for TLS acceleration. I have done some simple comparison with AES CTR mode software vs CRYP peripheral. Results are similar like results at CycloneCRYPTO Benchmark webpages.

Regards,

Jan

[Bubbles]

Hi @JDosp.1,

I know what's the performance difference between SW and HW implementation. It's just that the example is a generic thing, supposed to run on most HW. It's then up to the user to adapt and optimize it. And in case of replacing SW AES with HW accelerated one, that's usually a trivial matter.

BR,

J

[JDosp.1]

Hi,

But I don't talk about examples but software package X-CUBE-AZURE-H7 which implements hardware abstraction layer for SMT32H7. Many of STM32H7 MCUs have CRYP/HASH peripheral. And here make sense to have implemented cryptography hardware acceleration for NetX secure.

Yes, I know that changing from SW to HW cryptography is possible. But calling this task trivial is slightly underrated. You can check how this have done Renesas with their own HW accelerators and NetX secure. You will be suprised how much need to be changed at NetX Crypto Components.

Regards,

Jan

[GFAIV]

Hi JDosp.1,

Isn't the package name X-CUBE-AZRTOS-H7 rather than X-CUBE-AZURE-H7?

Regards,

GF

[JDosp.1]

Hi GF,

Yes, it is. But name at this case is not important.

I have discussed this issue privately with ST. Unfortunately I was unpleasantly surprised what are ST plans about Azure RTOS (Eclipse ThreadX) at STM32 devices.

Jan

[Bubbles]

Hi @JDosp.1,

I assume you were in touch with some Prague ST colleague.

Yes, Microsoft stopped supporting the AZRTOS and we are not taking it over from them. The whole thing is sadly now on "community support".

BR,

J

[JDosp.1]

Hi Bubbles,

Sorry, but I think you are not understand my original question. Adding support for hardware acceleration for NetX secure, were promised from ST side, but it will never come.

What is expected level support with will ST provide for Eclipse ThreadX now? What is meaning of following words:

“STMicroelectronics is constantly investing in STM32 ecosystem and our collaboration with Eclipse Foundation and the community partners is part of our continuous efforts to bring innovative software solutions to STM32 developers,” said Daniel Colonna, Director General-Purpose MCU Marketing, STMicroelectronics. “We see Eclipse ThreadX and middleware as an important piece of our development environment, which gives STM32 developers a full range of support and choice.” - source.

Regards,

Jan

[JDosp.1]

Hi Support,

Any answer for my question?

Jan