In STM32Cube_FW_H7RS_V1.3.0, file Projects\STM32H7S78-DK\Applications\ROT\OEMiROT_Boot\Inc\stm32_extmem_conf.h:
The configuration for the external RAM (presumably for an APS256XXN-OBR-BG, since that's what on the DK) is incorrect. In particular, it doesn't set the latency values to be able to run at 200 MHz.
(I think that the dummy cycle values may also be wrong - but I suspect they're ignored anyway.)
Here's my code (I also changed the drive strength, but that may not be necessary). Without these changes, the RAM could be read, but not written:
.PsramObject =
{
.psram_public = {
.MemorySize = HAL_XSPI_SIZE_256MB, /* memory size is 256Mbit */
.FreqMax = 200000000u, /* 200Mhz */
.NumberOfConfig = 3,
/* Config */
{
#define EXTRAM_MR0_READ_LATENCY_MASK (0x7 << 2)
#define EXTRAM_MR0_DRIVE_STRENGTH_HALF (0x1 << 0)
#define EXTRAM_MR0_READ_LATENCY_200_MHz (0x4 << 2)
#define EXTRAM_MR0_DRIVE_STRENGTH_MASK (0x3 << 0)
#define EXTRAM_MR4_WRITE_LATENCY_MASK (0x7 << 5)
#define EXTRAM_MR4_WRITE_LATENCY_200_MHz (0x1 << 5)
#define EXTRAM_MR8_MODE_MASK (1 << 6)
#define EXTRAM_MR8_MODE_X16 (1 << 6)
{.WriteMask = EXTRAM_MR8_MODE_MASK, .WriteValue = EXTRAM_MR8_MODE_X16, .REGAddress = 0x08},
{.WriteMask = EXTRAM_MR0_READ_LATENCY_MASK | EXTRAM_MR0_DRIVE_STRENGTH_MASK,
.WriteValue = EXTRAM_MR0_READ_LATENCY_200_MHz | EXTRAM_MR0_DRIVE_STRENGTH_HALF, .REGAddress = 0x00},
{.WriteMask = EXTRAM_MR4_WRITE_LATENCY_MASK, .WriteValue = EXTRAM_MR4_WRITE_LATENCY_200_MHz, .REGAddress = 0x04},
},
/* Memory command configuration */
.ReadREG = 0x40u,
.WriteREG = 0xC0u,
.ReadREGSize = 2,
.REG_DummyCycle = 6u,
.Write_command = 0xA0u,
.Write_DummyCycle = 6u,
.Read_command = 0x20u,
.WrapRead_command = 0x00u,
.Read_DummyCycle = 6u,
}and as a diff:
