why LL_GPIO_PIN_... defined with or and Left shift?

[hosseinam1370]

#define LL_GPIO_PIN_6 ((GPIO_BSRR_BS6 << GPIO_PIN_MASK_POS) | 0x00000040U) /*!< Select pin 6 */
#define LL_GPIO_PIN_7 ((GPIO_BSRR_BS7 << GPIO_PIN_MASK_POS) | 0x00000080U) /*!< Select pin 7 */
#define LL_GPIO_PIN_8 ((GPIO_BSRR_BS8 << GPIO_PIN_MASK_POS) | 0x04000001U) /*!< Select pin 8 */
#define LL_GPIO_PIN_9 ((GPIO_BSRR_BS9 << GPIO_PIN_MASK_POS) | 0x04000002U) /*!< Select pin 9 */
#define LL_GPIO_PIN_10 ((GPIO_BSRR_BS10 << GPIO_PIN_MASK_POS) | 0x04000004U) /*!< Select pin 10 */

hi.

I've run into an issue with the definition in the LL library for selecting pin 8, and I can't figure out what's going on. For example, GPIO_BSRR_BS8 is already defined and set for pin 8, but then it gets shifted left with GPIO_PIN_MASK_POS, which has a value of 8, and more confusingly, it gets OR 'd with the hexadecimal value 0x04000001U. I can't understand why they've done this. No matter how I calculate it, in the registers, bit 8 in both the set and reset registers doesn't get filled with 1. Could you explain why this is done?

[TDK]

Why is it done? Convenience and backwards compatibility, although it doesn't help much with readability at the bit level. The leading 0x04 is a flag to let functions know it's pin 8+, as some registers are split 8/8 between pins.

> No matter how I calculate it, in the registers, bit 8 in both the set and reset registers doesn't get filled with 1.

In what context? The LL_GPIO_(Re)SetOutputPin functions certainly set the correct bits. Note that the mask gets unshifted and masked before being sent to BSRR.

__STATIC_INLINE void LL_GPIO_SetOutputPin(GPIO_TypeDef *GPIOx, uint32_t PinMask)
{
  WRITE_REG(GPIOx->BSRR, (PinMask >> GPIO_PIN_MASK_POS) & 0x0000FFFFU);
}

"LL_GPIO_SetOutputPin(GPIOA, LL_GPIO_PIN_x)" is equivalent to "GPIOA->BSRR = GPIO_BSRR_BSx"

That's correct.