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Weird PWM behaviour for pin PB4 on f103c8t6

cosminrs
Associate

Hello. I have a custom board with original f103c8t6 (sampled from eStore). PWM for pin PB4 is not functional, but bit banging with gpio write works. If tim3 respective channel is configured as pwm output, the output is stuck at VCC.  
I configured the board correctly in CubeMX, as every other pin works correctly (including pin PB5, same timer, different channel) and double checked it again and again. 
Unfortunately I can't attach a project that reproduces the bug at the moment as I moved forward by changing the operating mode of the board (it commands a MC33926PNB H bridge and instead of having the H bridges enabled and sending PWM over IN1 and IN2, i set them as high or low depending on the direction and pwm the enable input, which functions well), but in a few days I can reproduce it. 
I am curios about what can cause the strange behaviour. It's not a conflict between JTAG reset as I have SWD enabled and even disabled it for a test which led to the same results.

Here are the schematic files and the current project that makes use of the GPIO, along with some code that reads data from an I2C magnetic encoder and PID loop for motor control with USB commands.

1 ACCEPTED SOLUTION

Accepted Solutions
TDK
Super User

Create a stripped down project that only toggles PB4. Does this work?

How are you confirming that it isn't working? Reading IDR/ODR bits would be the most direct.

Show a large in focus picture of the board. Might help.

If you feel a post has answered your question, please click "Accept as Solution".

View solution in original post

3 REPLIES 3
TDK
Super User

Create a stripped down project that only toggles PB4. Does this work?

How are you confirming that it isn't working? Reading IDR/ODR bits would be the most direct.

Show a large in focus picture of the board. Might help.

If you feel a post has answered your question, please click "Accept as Solution".

Check that you have correctly set up AF remapping for PB4. Refer to chapter 9.3.7 (Timer alternate function remapping) in the reference manual, Table 44. (TIM3 alternate function remapping). It states that for output on PB4, you must have "partial remap" enabled (AFIO_MAPR register). Also, check that you have enabled the clock to "remapping" peripheral. The AFIOEN bit in the RCC_APB2ENR register. I think the HAL function is
__HAL_RCC_AFIO_CLK_ENABLE()

https://www.st.com/resource/en/reference_manual/rm0008-stm32f101xx-stm32f102xx-stm32f103xx-stm32f105xx-and-stm32f107xx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

 

Started another project with what looks like the same config and indeed it does work. Will look further into what exactly are the differences between the 2 projects. Thank you