Hello,
I am implementing SPI master communication on an STM32G474RE, transferring 68 bytes per transaction. However, I am unable to achieve the desired SPI clock speed of 5 MHz—currently the SPI clock only reaches approximately 3 MHz.
The system clock is configured at 160 MHz, and I have tested the peripheral clock (PCLK) at both 80 MHz and 160 MHz. Based on these clock settings, I tried multiple SPI prescaler values (16 and 32) to obtain a 5 MHz SCK frequency. In addition, the SPI_SCK pin is configured in High-Speed mode. Despite these settings, the SPI output clock still does not exceed approximately 3 MHz.
Has anyone experienced similar limitations, or is there an additional configuration step required to achieve a stable 5 MHz SPI SCK on the STM32G474RE? Any guidance or suggestions would be greatly appreciated.
Thanks in advance.
