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STM32U595ZJT6Q USB not initializing

SYako
Associate III

I'm trying to work with USB on STM32U595ZJT6Q (with SMPS)

Ref Clock Selection under USB_OTG_HS is set to 16MHz
OTS HS Clock Mux is set to HSE (the board has 16MHz crystal)

CubeMX 6.11
STM32Cube_FW_U5_V1.5.0

The code is stuck in USB_CoreReset, more specifically it waits for USB_OTG_GRSTCTL_CSRST to become 0

 

 do
  {
    count++;

    if (count > HAL_USB_TIMEOUT)
    {
      return HAL_TIMEOUT;
    }
  } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);

 

After searching the forum I discovered that CubeMX is not generating __HAL_RCC_SYSCFG_CLK_ENABLE call in HAL_PCD_MspInit. However, after adding this call nothing changes.

 

void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{

  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  if(pcdHandle->Instance==USB_OTG_HS)
  {
  /* USER CODE BEGIN USB_OTG_HS_MspInit 0 */
  __HAL_RCC_SYSCFG_CLK_ENABLE();
  /* USER CODE END USB_OTG_HS_MspInit 0 */

 

Can someone help me resolve the issue?

1 ACCEPTED SOLUTION

Accepted Solutions
SYako
Associate III

Okay, I think I figured it out. SYSCLK has to be more than 48MHz. Just changing it to 64 MHz fixed an issue.

View solution in original post

7 REPLIES 7
AScha.3
Chief

Do you set the USB clock to 48Mhz ?

I don't understand what you wrote.

If you feel a post has answered your question, please click "Accept as Solution".

It's not even possible to set 48MHz with U5 seriesUntitled.png

Ok, sorry - 48M is mandatory for full speed , but you set it to hi speed . So ok , but i wouldn't choose the lowest clk.

btw

I found in similar H5 USB setting : the power enable was missing - so check, if this is there.

I added in xxx_hal_msp.c :

in 

void HAL_HCD_MspInit(HCD_HandleTypeDef* hhcd)

  /* USER CODE BEGIN USB_DRD_FS_MspInit 1 */
    HAL_PWREx_EnableVddUSB();
  /* USER CODE END USB_DRD_FS_MspInit 1 */

  

If you feel a post has answered your question, please click "Accept as Solution".
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{

  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  if(pcdHandle->Instance==USB_OTG_HS)
  {
  /* USER CODE BEGIN USB_OTG_HS_MspInit 0 */
  __HAL_RCC_SYSCFG_CLK_ENABLE();
  /* USER CODE END USB_OTG_HS_MspInit 0 */

  /** Initializes the peripherals clock
  */
    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USBPHY;
    PeriphClkInit.UsbPhyClockSelection = RCC_USBPHYCLKSOURCE_PLL1;
    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
    {
      Error_Handler();
    }

  /** Set the OTG PHY reference clock selection
  */
    HAL_SYSCFG_SetOTGPHYReferenceClockSelection(SYSCFG_OTG_HS_PHY_CLK_SELECT_6);

    /* USB_OTG_HS clock enable */
    __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
    __HAL_RCC_USBPHYC_CLK_ENABLE();

    /* Enable VDDUSB */
    if(__HAL_RCC_PWR_IS_CLK_DISABLED())
    {
      __HAL_RCC_PWR_CLK_ENABLE();
      HAL_PWREx_EnableVddUSB();

      /*configure VOSR register of USB*/
      HAL_PWREx_EnableUSBHSTranceiverSupply();
      __HAL_RCC_PWR_CLK_DISABLE();
    }
    else
    {
      HAL_PWREx_EnableVddUSB();

      /*configure VOSR register of USB*/
      HAL_PWREx_EnableUSBHSTranceiverSupply();
    }

    /*Configuring the SYSCFG registers OTG_HS PHY*/
    /*OTG_HS PHY enable*/
      HAL_SYSCFG_EnableOTGPHY(SYSCFG_OTG_HS_PHY_ENABLE);

    /* USB_OTG_HS interrupt Init */
    HAL_NVIC_SetPriority(OTG_HS_IRQn, 0, 0);
    HAL_NVIC_EnableIRQ(OTG_HS_IRQn);
  /* USER CODE BEGIN USB_OTG_HS_MspInit 1 */

  /* USER CODE END USB_OTG_HS_MspInit 1 */
  }
}

There is an  HAL_PWREx_EnableVddUSB() call that is executed (line 40).

Also tried 24MHz and 32MHz by using the PLL(16MHz was from HSE). Maybe it's a good option to physically change the crystal for a 24/32MHz one?

Ok, so PWREx_Enable seems not the problem here.

+

> to physically change the crystal for a 24/32MHz one?

No, this is just the reference clock, you set in clock tree , what you want; it should be no difference, what crystal is used. I always prefer a standard frequency here, 8 or 16 M .

Just - what i dont understand : is line 36 : 

__HAL_RCC_PWR_CLK_DISABLE();

I would comment out this - just to test, what happens...and/replace with xxx_ENABLE () .

If you feel a post has answered your question, please click "Accept as Solution".
if(__HAL_RCC_PWR_IS_CLK_DISABLED())
    {
      __HAL_RCC_PWR_CLK_ENABLE();
      HAL_PWREx_EnableVddUSB();

      /*configure VOSR register of USB*/
      HAL_PWREx_EnableUSBHSTranceiverSupply();
      __HAL_RCC_PWR_CLK_DISABLE();
    }
    else
    {
      HAL_PWREx_EnableVddUSB();

      /*configure VOSR register of USB*/
      HAL_PWREx_EnableUSBHSTranceiverSupply();
    }

Because __HAL_RCC_PWR_IS_CLK_DISABLED check is failed only else branch is being executed.
However just to be safe I tried commenting and changing to ENABLE, still to luck.

SYako
Associate III

Okay, I think I figured it out. SYSCLK has to be more than 48MHz. Just changing it to 64 MHz fixed an issue.