stm32U585 + 2 x APS25608N OSPI - speed problems

[ccuebler]

Hai All!

I use 2 pieces of APS25608N PSRAM on OSPI bus with memory mapped mode. The MCU run at 1.8V, 160MHz system clock. Previously, I used APS12808N at 80MHz and 3.3V VDD without any issues.

Currently, the PSRAMs run at 50MHz, but need to speed up to 100 or 160MHz.
I thought the aps256's default settings should be good up to 100MHz, but they weren't.

My working settings at 50MHz was ( relevant source in attachment): 
MR0: Fix type latency, latency code 5, and full strength (25 ohms).
MR8: 32Byte Warp burst and without crossing.

OSPI settings are:
Dummy cycles:  Read = 8, Write = 4

  hospi->Init.FifoThreshold           = 4;
  hospi->Init.DualQuad                = HAL_OSPI_DUALQUAD_DISABLE;
  hospi->Init.MemoryType              = HAL_OSPI_MEMTYPE_APMEMORY;
  hospi->Init.DeviceSize              = 25;
  hospi->Init.ChipSelectHighTime      = 2;
  hospi->Init.FreeRunningClock        = HAL_OSPI_FREERUNCLK_DISABLE;
  hospi->Init.ClockMode               = HAL_OSPI_CLOCK_MODE_0;
  hospi->Init.WrapSize                = HAL_OSPI_WRAP_NOT_SUPPORTED;
  hospi->Init.ClockPrescaler          = 2;
  hospi->Init.SampleShifting          = HAL_OSPI_SAMPLE_SHIFTING_NONE; // None
  hospi->Init.DelayHoldQuarterCycle   = HAL_OSPI_DHQC_ENABLE;
  hospi->Init.ChipSelectBoundary      = 10;
  hospi->Init.DelayBlockBypass        = HAL_OSPI_DELAY_BLOCK_USED;
  hospi->Init.MaxTran                 = 0;
  hospi->Init.Refresh                 = 640;

So, I try to speed up to 80MHz:
The MR0 and MR8 register settings are same, and it written MRs to APS256 successfully (I read back and compared ).
For the best delay block settings, I ran the delay block fine tuner, but doesn't found any good option. 

I also tried to modify MR0 values ( increase / decrease the latency code, changed the drive strength, etc.), without any success.
I played with the refresh time used calculated values. I wrote a simple delay block tuner like function to search a good refresh time.
I measured the clock, chip select and data0 lines against with oscilloscope, and I saw only a little overshoot, but the timings was good. (fast signal rising and falling, and data lines stabilized on time)
I think, it's only a configuration or settings-related issue. 
At the end, I confused, what is the relationship between latency code and dummy cycle.

What is the best settings: How can I speed up to 100 or 160MHz the PSRAMs? 
Please check my attached code.

Thank you.

[KDJEM.1]

Hello @ccuebler ;

Could you please share clock and data waveforms for different frequencies: 50 MHz and 80 MHz?

Which voltage range are you using?

Please refer to STM32U585 datasheet and check the maximum OCTOSPI clock?

Thank you.

Kaouthar

[Sco]

I suggest you refer to the datasheet, and find the "power configuration" of your board to see the maximum frequency the STM32U585 can run.

if you are developping a new board, the next point maybe to check there's no hardware constrain for the layout of the board, Impedance matching, equal length...