STM32N6 I2C Logic Levels

[Lucky1]

I have an I2C device that only operates with 1.8V logic (Pins are not 3.3V tolerant) that I want to connect to the STM32N6.  I don't want to add an I2C redriver if I can avoid it.  I want to keep as many of my I/O pins on the STM32N6 powered from 3.3V as I can. 

Which power rail on the STM32N6 determines the logic high voltage for the I2C bus? I want to use the 1.8V rail on my design for the I2C SDA and SCL pull-up resistors.

Thanks

[AScha.3]

So invest 20 ct and use a standard circuit, for level shifting:

[Lucky1]

Thank you for the quick response.  However, reducing the area of the PCB is the driver for this design.  I'm familiar with the NXP PCA9517 to shift logic levels on I2C, but I need to reduce board size wherever I can.

The 4000+ page manual (RM0486) is well written, but the section for I2C doesn't specify which power supply pins set the logic level.  I assume that it is the VDD pins I have tied to 3.3V, but wanted to verify.

[RomainR.]

Hello @Lucky1 

All the GPIOs of the N6 are native 1.8V, but by default they are 3.3V tolerant. This will depend on the bit configurations in OTP 124 HCONF and VDDIOxVRSEL in PWR registers.
Refer to AN5967 - Rev 3 section 12.4 I/O speed settings and the domains VDD, VDDIO2 to VDDIO5 which correspond to the GPIO I2Cx you want to use.
Regarding the alternate I2C functions, you need to look at the AF4 to AF6 mapping in DS14791 Table 19 and configure the OTP124 bit and VDDIOxVRSEL according to the GPIO group you have chosen.

Is it a custom hardware ?

Which STM32N6 package ?

Let me know please.

Best regards,

Romain,

[Lucky1 · Accepted solution]

Romain,

It is a custom PCB being designed using the STM32N657X0H3Q, but we may go to the 0.4mm pitch part for the next revision.

I'm using PH9 for SCL and PC1 for SDA.  I've changed VDDIO4 to 1.8V so I think this will eliminate the I2C level translators.

I think changing VDDIO4 solves the issue.

Thanks for the help.