STM32H755: VDD powered while VDDA/VREF+ unpowered – safe?

[Droeme]

Hello,

I am designing a board with an STM32H755ZIT6 and want to verify whether my power architecture is safe.

Power architecture:

• Battery input

• Two buck converters:

  • 3.3 V buck → MCU VDD

  • 5 V buck → LDO + voltage reference → VDDA and VREF+

Operating case:
For a certain battery voltage range:

• 3.3 V buck is enabled

• 5 V buck is disabled

Result:

• VDD = 3.3 V

• VDDA and VREF+ = 0 V

Relevant datasheet sections:

• Power supply management (3.5):
  When VDD > 1 V, all power supplies are independent (except VDDSMPS).

• Absolute maximum ratings (6.2):
  “All main power (VDD, VDDA, VDD33USB, VDDSMPS, VBAT) pins must always be connected to the external power supply, in the permitted range.”

All conditions appear to be met, but I want to make sure I’m not missing anything, especially since I remember other STM32 families where powering VDD without VDDA is problematic.

Question:
Is it safe and within spec on the STM32H755 to have VDD powered while VDDA/VREF+ are unpowered, assuming no analog peripherals are used?

I would like to confirm this before ordering boards.

Thanks!

[AScha.3]

Hi,

from H755 ds :

So Vdda can be 0 , if nothing used on analog supply...adc...vrefbuf.

+

So Vref+ can be same as Vdda , if all 0 V , is ok.

[TDK · Accepted solution]

VDD above VDDA is no problem. The reverse is not allowed. You will need to ensure that the same order happens when they are powered down as well. A Schottky diode from VDDA to VDD will ensure this.

From the datasheet, ensure you are never in the solid pink areas.

This applies to STM32H7. Some other families are different.