2021-01-10 9:51 PM
Hey guys, setting up External GPIO interrupts
I wanted to setup PA0, PB4, and PC6 as GPIO interrupt. The PB4 works perfectly it goes into the IRQ handler no problem, however
PA0 and PC6 have similar issues for some reason they dont want to call the IRQ Handler, but the funniest part is the EXTI->PR Registers sees these pin being interrupted (The flag gets set). Whats going on?
Code:
GPIO Init:
#include "GPIO.h"
void init_GPIO(void) {
RCC->AHB4ENR &= ~RCC_AHB4ENR_GPIOBEN;
RCC->AHB4ENR |= RCC_AHB4ENR_GPIOBEN;
RCC->AHB4ENR |= RCC_AHB4ENR_GPIOAEN;
RCC->AHB4ENR |= RCC_AHB4ENR_GPIOCEN;
GPIOB->MODER &= ~GPIO_MODER_MODE0;
GPIOB->MODER &= ~GPIO_MODER_MODE1;
GPIOB->MODER &= ~GPIO_MODER_MODE2;
GPIOB->MODER &= ~GPIO_MODER_MODE3;
GPIOA->MODER &= ~GPIO_MODER_MODE0;
GPIOB->MODER &= ~GPIO_MODER_MODE4;
GPIOC->MODER &= ~GPIO_MODER_MODE6;
GPIOB->MODER |= GPIO_MODER_MODE0_OUTPUT;
GPIOB->MODER |= GPIO_MODER_MODE1_OUTPUT;
GPIOB->MODER |= GPIO_MODER_MODE2_OUTPUT;
GPIOB->MODER |= GPIO_MODER_MODE3_OUTPUT;
GPIOA->MODER |= GPIO_MODER_MODE0_INPUT;
GPIOB->MODER |= GPIO_MODER_MODE4_INPUT;
GPIOC->MODER |= GPIO_MODER_MODE6_INPUT;
GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD0;
GPIOB->PUPDR &= ~GPIO_PUPDR_PUPD4;
GPIOC->PUPDR &= ~GPIO_PUPDR_PUPD6;
GPIOA->PUPDR |= GPIO_PUPDR_PUPD0_UP;
GPIOB->PUPDR |= GPIO_PUPDR_PUPD4_UP;
GPIOC->PUPDR |= GPIO_PUPDR_PUPD6_UP;
GPIOB->BSRR |= GPIO_BSRR_BS0;
GPIOB->BSRR |= GPIO_BSRR_BS1;
GPIOB->BSRR |= GPIO_BSRR_BR2;
GPIOB->BSRR |= GPIO_BSRR_BR3;
}
Interrupt Init
/*
* Interrupt_Driver.c
*
* Created on: Nov. 5, 2020
* Author: Christopher
*/
#include "Interrupt.h"
void init_Interrupt(){
RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;
SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PA;
SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI4_PB;
SYSCFG->EXTICR[1] |= SYSCFG_EXTICR2_EXTI6_PC;
EXTI->IMR1 |= EXTI_IMR1_IM0;
EXTI->IMR1 |= EXTI_IMR1_IM4;
EXTI->IMR1 |= EXTI_IMR1_IM6;
EXTI->FTSR1 |= EXTI_FTSR1_TR0;
EXTI->FTSR1 |= EXTI_FTSR1_TR4;
EXTI->FTSR1 |= EXTI_FTSR1_TR6;
NVIC_EnableIRQ(EXTI0_IRQn);
NVIC_SetPriority(EXTI0_IRQn,3);
NVIC_EnableIRQ(EXTI4_IRQn);
NVIC_SetPriority(EXTI4_IRQn,3);
NVIC_EnableIRQ(EXTI9_5_IRQn);
NVIC_SetPriority(EXTI9_5_IRQn,3);
NVIC_EnableIRQ(DMA1_Stream0_IRQn);
NVIC_SetPriority(DMA1_Stream0_IRQn,0);
NVIC_EnableIRQ(DMA1_Stream4_IRQn);
NVIC_SetPriority(DMA1_Stream4_IRQn,0);
NVIC_EnableIRQ(DMA1_Stream3_IRQn);
NVIC_SetPriority(DMA1_Stream3_IRQn,0);
NVIC_EnableIRQ(DMA1_Stream2_IRQn);
NVIC_SetPriority(DMA1_Stream2_IRQn,3);
//NVIC_EnableIRQ(TIM15_IRQn);
//NVIC_SetPriority(TIM15_IRQn,3);
}
Main:
void EXTI0_IRQ_handler(void){
if (((EXTI->PR1) & (EXTI_PR1_PR0)) != 0) {
EXTI->PR1 |= EXTI_PR1_PR0;
if (GPIOPlayPause == 0) {
GPIOPacket = 0x10;
GPIOPlayPause = 1;
} else if (GPIOPlayPause == 1){
GPIOPacket = 0x11;
GPIOPlayPause = 0;
}
GPIO_Rx_Callback = 1;
}
}
void EXTI4_IRQHandler(void){
if (((EXTI->PR1) & (EXTI_PR1_PR4)) != 0) {
EXTI->PR1 |= EXTI_PR1_PR4;
GPIOPacket = 0x12;
GPIO_Rx_Callback = 1;
}
}
void EXTI9_5IRQhandler(void){
if (((EXTI->PR1) & (EXTI_PR1_PR6)) != 0) {
EXTI->PR1 |= EXTI_PR1_PR6;
GPIOPacket = 0x13;
GPIO_Rx_Callback = 1;
}
}
2021-01-11 6:10 AM
> void EXTI0_IRQ_handler(void){
> void EXTI9_5IRQhandler(void){
These names don't match the names of the default IRQHandler provided in ST files.
> EXTI->PR1 |= EXTI_PR1_PR0;
This clears ALL flags that are currently set in EXTI->PR1. To only clear PR0:
EXTI->PR1 = EXTI_PR1_PR0;
2021-01-11 8:43 AM
Thank you, I expected it wasnt that. Working late never helps. Fixed it thank you. You sure about the EXTI->PR1 clear? its working for me thus far and its clearing individual bits, and it says to write a 1 in it
2021-01-11 9:58 AM
2021-01-11 11:54 AM
Ahh you're right, I guess you can & it as well no? but thank you oversight on my part