2025-04-22 11:02 PM
I have a +30V -30V input to be fed to STM32H7 ADC 16-bit
I tried using a 2 resistor potential divider using 33K 3.3K ; 1K 100E, 1M 100K, resistor combinations but the output is not correctly read by the ADC. (For 3V input, ADC reads from 2.2V to 3.2V randomly fluctuating) Not constant
But if I bypass the divider circuit and feed an input less than 3.3V to the ADC pin directly, it reads perfectly (For 3V input, it reads 2.9999).
Should sampling time affect the resistor values?
2025-04-24 1:54 AM
@MasterT wrote:Internal ADC are always noisy, especially when Reference voltage has no Vref- differential part.
Just do oversampling & averaging
Not that noisy! 350 counts between max and min. That's a lot.
I disagree with averaging something that noisy. The source of the noise needs to be fixed first. Then the remaining noise (1-2 counts) can be averaged to reduce noise and optionally increase resolution.
1-2 count? Sure you never tested internal stm32 adc. 7 LSB (+-128 "counts") is a Normal for 16-bits H7. Depends on uCPU package, I played with nucleo boards, 144 pins, but ST says BGA IC have better ADC performance.
2025-04-24 2:07 AM
@MasterT wrote:
@MasterT wrote:Internal ADC are always noisy, especially when Reference voltage has no Vref- differential part.
Just do oversampling & averaging
Not that noisy! 350 counts between max and min. That's a lot.
I disagree with averaging something that noisy. The source of the noise needs to be fixed first. Then the remaining noise (1-2 counts) can be averaged to reduce noise and optionally increase resolution.1-2 count? Sure you never tested internal stm32 adc. 7 LSB (+-128 "counts") is a Normal for 16-bits H7. Depends on uCPU package, I played with nucleo boards, 144 pins, but ST says BGA IC have better ADC performance.
I've worked with many STM32 MCUs. Never did I see 7 LSB noise. I use filtered analog power supplies and I decouple the reference externally.
2025-04-24 2:13 AM
I've worked with many STM32 MCUs. Never did I see 7 LSB noise. I use filtered analog power supplies and I decouple the reference externally.
4 LSB for 12-bits, that is about any DS states.
Decoupling doesn't have much if Vref- is missing, as I mention. 300 mA uCPU with 1 (? may be more) mOhm bounding wire resistance already sets 14-bits limit
2025-04-24 3:19 AM
@MasterT wrote:
I've worked with many STM32 MCUs. Never did I see 7 LSB noise. I use filtered analog power supplies and I decouple the reference externally.Decoupling doesn't have much if Vref- is missing, as I mention. 300 mA uCPU with 1 (? may be more) mOhm bounding wire resistance already sets 14-bits limit
"Depending on the package, VREF+ can be internally connected to VDDA and VREF- to VSSA."
VREF- is internally connected to VSSA if it is not on an external pin. No way is the ADC drawing 300mA.
I have an STM32H7 on my desk and I measure the supply voltage on the board with the MCU. Very little noise.
2025-04-24 3:38 AM
> Should sampling time affect the resistor values?
Yes, sampling is affected by input resistance.
I don't know what method your MCU uses is based upon, presumably successive approximation.
For this type, the input voltage charges the S&H capacitor for the selected sampling time, then the capacitor is switched to the internal conversion circuitry.
If the input voltage can't charge it fully up - either because the sampling time is too short, the input impedance is too high, or both - you get incorrect voltage. And, if you convert multiple channels, you get "bleed over", i.e. interference with subsequent channels.
Check the datasheet carefully, if the proper conditions are met.
A buffer amplifier is recommended for such instances.
2025-04-24 5:13 AM
@unsigned_char_array @TDK @MasterT @Ozone @mƎALLEm
A few observations.
I monitored a 8.1V battery fed to the divider-buffer circuit. Below attached is the log plot.
What are the possible reasons for these spikes? If these are avoided, it will be great.
2025-04-24 5:24 AM
Did you measure with an oscilloscope or is this data from the ADC? Without a comparison between actual voltage and ADC counts it's hard to know where the problem is.
Do the wires to VSSA and VADC form a loop? A buffer should have a low enough impedance so there shouldn't be too much signal picked up at 8-10cm wire length, but it is better to avoid any loops.
2025-04-24 5:42 AM
This data is from ADC. I checked the 8.1V battery output on oscilloscope and it had a ripple less than 10mV. Much better than a calibrator source or a standalone power supply that I checked (50mV, 700mV). This log was taken with the battery input.
VDDA, Vref+ are connected together on the PCB itself and they have an additional decoupling of 10nF and 10uF.
3.3V and GND are taken from the PCB using shortest possible length of wires on to the stripboard.
2025-04-24 5:55 AM
@Jonah9Veh wrote:I checked the 8.1V battery output on oscilloscope and it had a ripple less than 10mV. Much better than a calibrator source or a standalone power supply that I checked (50mV, 700mV). This log was taken with the battery input.
Good. Though I was hoping you checked on the ADC input with respect to ADC REF+ and VSSA.
@Jonah9Veh wrote:VDDA, Vref+ are connected together on the PCB itself and they have an additional decoupling of 10nF and 10uF.
3.3V and GND are taken from the PCB using shortest possible length of wires on to the stripboard.
Where have you connected VSSA?
2025-04-24 6:31 AM
10 cm of wires is too long ! Put a capacitor as close to uCPU as possible, in between AGND (analog ground plane) and ADC input. 0.1-1 uF, and if buffer OPA is in use, series resistance 10-50 Ohm from OPA output.
For battery measurements oversampling is the best way to do noise reduction.