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PieterG
Associate III
June 6, 2024
Solved

STM32H5 ECC errors and ICACHE invalidation

Should ICACHE be invalidated when a double ECC error occurs?

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Sarra.SBest answer
ST Employee
June 20, 2024

Hello @PieterG, sorry for the delayed answer, 

When two ECC errors occur during a read, the flash interface sets the double error detection flag ECCD in the FLASH_ECCDETR register

and when this flag is raised, an NMI is generated, and the software must invalidate the instruction cache (CACHEINV = 1) in the NMI interrupt service routine when the ECCD flag is set.

I hope that answers your question! 

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6 replies

Sarra.S
ST Employee
June 7, 2024

Hello @PieterG, 

Please check: How to avoid a hard fault when ICACHE is enabled on the STM32H5 series

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PieterGAuthor
Associate III
June 7, 2024

Maybe I've overlooked it, but I have read the article several times and it does not mention how ECC errors are to be handled?

 

I am quite sure that I read about invalidating ICACHE after a double ECC error, but I cannot find it anymore in the official documentation, nor any of the examples.

Does it make any sense to invalidate ICACHE when a double ECC error occurs in FLASH? Or is there no need for that? 

Sarra.SBest answer
ST Employee
June 20, 2024

Hello @PieterG, sorry for the delayed answer, 

When two ECC errors occur during a read, the flash interface sets the double error detection flag ECCD in the FLASH_ECCDETR register

and when this flag is raised, an NMI is generated, and the software must invalidate the instruction cache (CACHEINV = 1) in the NMI interrupt service routine when the ECCD flag is set.

I hope that answers your question! 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
    PieterGAuthor
    Associate III
    June 20, 2024

    Thank you @Sarra.S for your answer.

    I guess invalidating the ICACHE is only necessary when ICACHE is enabled for the flash sector in which the error occurred? (in other words, I do not have to invalidate ICACHE for double ECC errors in OTP / EDATA for which I disabled caching in the MPU)

    Sarra.S
    ST Employee
    June 20, 2024

    Yes! 

    To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
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