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STM32F4 Enabling and Disabling SPI using Timer or DMA

ribdp
Associate II

Hello,

 

I'm using the STM32F469NiH6 to try and do a certain number of SPI transactions (let's say 12 bytes) at regular intervals without core intervention, using Timers and DMA. And I have a couple of questions concerning this (I have had a look into the RM, in particular the peripheral registers, but a second opinion would be useful in case I missed/misunderstood anything)

 

  1. Is there a way for any of the timers to enable/disable the SPI directly?
  2. Is it possible to use DMA (triggered by a PWM edge, for instance) to enable/disable a different peripheral (like SPI) by writing to its configuration register (setting the Enable bit) ?

 

If there's any help, official examples, community forum threads, or pointers to the Reference Manual, that definitively answer my questions above, that would be greatly helpful!

 

Thanks!

 

1 ACCEPTED SOLUTION

Accepted Solutions

If you want to disable SPI to stop transfer another data, then you probably go wrong way. Disabling is little bit complicated procedure (reference manual "28.3.8 Disabling the SPI") and blind clear SPE can corrupt  ongoing transfer. Therefore you need to stop transfer another way to be able correctly disable SPI... There are multiple ways how to transfer number of data a then stops. First way is to set DMA in "normal" mode. Then DMA transfers selected number of data to SPI and then stop transfering and thus also SPI stops transferring. After each data burst you have to "disable-reload-enable" DMA to manage another burst. If you need to manage whole transfers completly autonomously there are another way to do it, but it is little complicated (you can use TIM1 or TIM8 with feature called "repetition counter" and "one pulse" mode to generate predefined number of periods and predefined number of DMA requests transferring data to SPI...

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5 REPLIES 5
Uwe Bonnes
Principal II

If you need the 12 bytes surrounded by assert/deassert CS, the STM32F4 SPI periperal can not do without program interaction or a very complex setup. Recent SPI peripheral, e.g. U5 has better ability to do so,

Thanks for the reply!

 


@Uwe Bonnes wrote:

If you need the 12 bytes surrounded by assert/deassert CS


I wouldn't think assert/deassert CS to be too critical to the problem at hand. I am okay with not using the hardware NSS, and instead driving CS as a PWM, or in some instances keeping it low throughout the 12*n bytes transaction. 

But I gather from your response that the SPI peripheral on F4 can't be enabled/disabled by Timers in the manner I was enquiring about?

Would you happen to know about the second question then - about whether MEM->PER DMA transfers can address any peripheral register (even the configuration register)? In my reading of the RM I didn't come across any section explicitly validating/negating that. But if this has been documented/explained somewhere else, that'd be pretty useful for me. 

 

Thanks again!

 

Yes, you should be able to write into SPI configuration register by DMA. Why do you need to disable SPI ?

So, I'm planning to setup a DMA stream respond to SPI TXE events, that will put bytes (or half-words) into the DR (data register) of SPI to initiate the transactions autonomously. 

I also want to have a predetermined delay between two consecutive 12 bytes transactions, mainly to conform to the digital interface requirements of this other device that the MCU is actually talking to, over SPI.

So I'd need a way to temporarily 'disable' SPI after each burst of 12 bytes' transaction. 

Thanks for the confirmation! I'll be sure to give this a try myself, shortly. 

 

If you want to disable SPI to stop transfer another data, then you probably go wrong way. Disabling is little bit complicated procedure (reference manual "28.3.8 Disabling the SPI") and blind clear SPE can corrupt  ongoing transfer. Therefore you need to stop transfer another way to be able correctly disable SPI... There are multiple ways how to transfer number of data a then stops. First way is to set DMA in "normal" mode. Then DMA transfers selected number of data to SPI and then stop transfering and thus also SPI stops transferring. After each data burst you have to "disable-reload-enable" DMA to manage another burst. If you need to manage whole transfers completly autonomously there are another way to do it, but it is little complicated (you can use TIM1 or TIM8 with feature called "repetition counter" and "one pulse" mode to generate predefined number of periods and predefined number of DMA requests transferring data to SPI...