Hello,
When I read though AN5200 (Getting started with STM32H7 Series SDMMC host controller), I am not sure I fully understand the statement about UHS-I mode support in Table 2. (SDMMC1 and SDMMC2 main features) as in below screenshot,
The table states that SDMMC2 does not have control signals for external voltage switch transceiver, but it also states in footnote that it seems can support a transceiver with bus direction sensing without the need for direction control signals.
I can not find further information in documents about how UHS-I mode on SDMMC2 is implemented, but what in the above table and the footnote implies it is possible. so I would like to ask here to confirm that
1) if UHS-I mode support can be achieved on SDMMC2 port, without direction control signals, and
2) As no clock feedback input pin and direction control pin on SDMMC2 port, are these pin actually not needed in this scenario? Thus a level shifter with bus direction sensing like TXB0108 (from TI) will be all that needed to do the job,
Thank you.
/Roland
