OCTOSPI signal integrity issue on STM32H723 vs STM32H725

[Jonshill]

Hello everyone,

This is my first post on the ST Community forum.

I recently moved from a custom 6-layer board using STM32H725IGKB to a simpler 4-layer board using STM32H723ZGT6. Both designs use an external OCTOSPI memory, with 50 ohm controlled-impedance routing and 33 ohm series resistors on the signals.

On the new 4-layer board, I am seeing read/write errors on the OCTOSPI interface, while the original 6-layer board works reliably with similar routing and firmware.

I would like to ask whether the OCTOSPI output driver characteristics or output impedance differ between STM32H725 and STM32H723, or if these issues are more likely related to signal integrity, stack-up, or return-path differences on a 4-layer PCB.

Any guidance or experience would be appreciated.

Thank you in advance.

[mƎALLEm · Accepted solution]

Hello @Jonshill and welcome to the ST community,

I think better to start to read this application note: AN4803 "High-speed SI simulations using IBIS and board-level simulations using HyperLynx® SI on STM32 MCUs and MPUs" and use IBIS information with HyperLynx tool and run simulations.

[Jonshill]

Thanks for the suggestion. I’ll go through AN4803 and look into running IBIS-based simulations with the HyperLynx SI tool  to better understand the signal integrity aspects on this new board.

Quick question: when using the HyperLynx tool with the STM32 IBIS models, are there any common pitfalls or specific settings you recommend for STM32H7 devices that I should pay attention to?

[mƎALLEm]

Nothing special to STM32H7. That application note provides STM32F7 and STM32MP15 but as examples. STM32F7 as a microcontroller and STM32MP15 as a microprocessor. The same process should applies to STM32H7.

If I answerd your original question please accept my previous post as solution.

Thanks.